KR950028303A - 지연회로 및 프로그램 가능한 지연회로망 - Google Patents

지연회로 및 프로그램 가능한 지연회로망 Download PDF

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Publication number
KR950028303A
KR950028303A KR1019950005479A KR19950005479A KR950028303A KR 950028303 A KR950028303 A KR 950028303A KR 1019950005479 A KR1019950005479 A KR 1019950005479A KR 19950005479 A KR19950005479 A KR 19950005479A KR 950028303 A KR950028303 A KR 950028303A
Authority
KR
South Korea
Prior art keywords
transistor
drain
source
field effect
gate
Prior art date
Application number
KR1019950005479A
Other languages
English (en)
Korean (ko)
Inventor
꼬우이찌 노로
Original Assignee
세끼자와 다다시
후지쓰 가부시끼가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 세끼자와 다다시, 후지쓰 가부시끼가이샤 filed Critical 세끼자와 다다시
Publication of KR950028303A publication Critical patent/KR950028303A/ko

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H03K5/133—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals using a chain of active delay devices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K2005/00013—Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse
    • H03K2005/00078—Fixed delay
    • H03K2005/00084—Fixed delay by trimming or adjusting the delay
    • H03K2005/00091—Fixed delay by trimming or adjusting the delay using fuse links

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Electronic Switches (AREA)
  • Pulse Circuits (AREA)
  • Dram (AREA)
KR1019950005479A 1994-03-18 1995-03-16 지연회로 및 프로그램 가능한 지연회로망 KR950028303A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP94-49605 1994-03-18
JP6049605A JPH07264021A (ja) 1994-03-18 1994-03-18 信号遅延回路及びプログラム可能な遅延回路

Publications (1)

Publication Number Publication Date
KR950028303A true KR950028303A (ko) 1995-10-18

Family

ID=12835872

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950005479A KR950028303A (ko) 1994-03-18 1995-03-16 지연회로 및 프로그램 가능한 지연회로망

Country Status (2)

Country Link
JP (1) JPH07264021A (ja)
KR (1) KR950028303A (ja)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6111796A (en) * 1999-03-01 2000-08-29 Motorola, Inc. Programmable delay control for sense amplifiers in a memory
DE10051937C2 (de) * 2000-10-19 2002-11-07 Infineon Technologies Ag Schaltungsanordnung zur Programmierung einer Verzögerungszeit eines Signalpfads

Also Published As

Publication number Publication date
JPH07264021A (ja) 1995-10-13

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Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E601 Decision to refuse application