KR940023323A - 회로 기판 - Google Patents

회로 기판 Download PDF

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Publication number
KR940023323A
KR940023323A KR1019940004963A KR19940004963A KR940023323A KR 940023323 A KR940023323 A KR 940023323A KR 1019940004963 A KR1019940004963 A KR 1019940004963A KR 19940004963 A KR19940004963 A KR 19940004963A KR 940023323 A KR940023323 A KR 940023323A
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KR
South Korea
Prior art keywords
dielectric film
circuit board
film
diamond
pores
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Application number
KR1019940004963A
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English (en)
Other versions
KR0153039B1 (ko
Inventor
다까아끼 야스모또
노부오 이와세
가오루 고이와
고지 야마까와
요시 이요기기
Original Assignee
사또 후미오
가부시끼가이샤 도시바
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Publication of KR940023323A publication Critical patent/KR940023323A/ko
Application granted granted Critical
Publication of KR0153039B1 publication Critical patent/KR0153039B1/ko

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3731—Ceramic materials or glass
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3732—Diamonds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3733—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon having a heterogeneous or anisotropic structure, e.g. powder or fibres in a matrix, wire mesh, porous structures
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0237—High frequency adaptations
    • H05K1/024—Dielectric details, e.g. changing the dielectric material around a transmission line
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
    • H05K3/4605—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated made from inorganic insulating material
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/467—Adding a circuit layer by thin film methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097—Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701—Low temperature co-fired ceramic [LTCC]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0104—Properties and characteristics in general
    • H05K2201/0116—Porous, e.g. foam
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0137—Materials
    • H05K2201/0179—Thin film deposited insulating layer, e.g. inorganic layer for printed capacitor

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical & Material Sciences (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Materials Engineering (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Inorganic Chemistry (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Laminated Bodies (AREA)

Abstract

본 발명은 복합 회로 기판 구조를 채용함으로써, 높은 방열성 및 높은 신호 전송 운반 속도라고 하는 회로 기판에 요구되는 2가지 특성을 만족시키고, 동시에 층간 박리 문제를 해결한 회로 기판을 제공하는 것을 목적으로 한다.
본 발명의 배선 기판은 기판 베이스(1)과 이 기판 베이스(1)상에 형성된 AIN, BN, 다이아몬드, 다이아몬드 라이크 카본, Beo, SiC중 적어도 한 종류로 이루어지고, 또 기공율이 체적 분율에서 5~70%인 유전체 박막(3,5,7)과 배선 금속막(2,4,6,8)을 구비한다. 배선 금속막(2,4,6,8)은 콘택트 홀(9,10,11)을 통해 서로 층간 접속되어 있다.

Description

회로 기판
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명의 회로 기판의 한 예를 도시한 종단면도, 제2도는 본 발명의 회로기판에 이용하는 유전체막에 있어서, 평면 형상이 원형인 기공(氣孔)을 배치하기 위한 2가지 방식을 도시한 도면, 제3도는 본 발명의 회로 기판에 이용하는 유전체막에 있어서, 평면 형상이 구형(舊形)인 기공을 배치하기 위한 2가지 방식을 도시한 도면이다.

Claims (8)

  1. 기판 베이스와 이 기판 베이스 상에 형성된 1층 이상의 유전체 막으로서, AIN, BN, 다이아몬드, 다이아몬드 라이크 카본, BeO 및 SiC로 이루어지는 군으로부터 선택되는 한 종류 이상으로 이루어지고, 5~95체적%의 기공율을 갖는 유전체막과 이 유전체막 상에 적층된 1층 이상의 배선 금속막을 구비하는 것을 특징으로 하는 회로 기판.
  2. 제1항에 있어서, 상기 유전체막은 박막법으로 막이 형성되고, 상기 기공은 이 박막법의 프로세스 조건을 제어함으로써 형성된 것을 특징으로 하는 회로 기판.
  3. 제1항에 있어서, 상기 유전체막 중의 기공은 기판 베이스 상에 막이 형성된 유전체 박막을 에칭 또는 천공함으로써 형성된 것을 특징으로 하는 회로 기판.
  4. 제3항에 있어서, 상기 유전체막에 있어서, 상기 기공은 일정 피치의 매트릭스 형태 평면 배치로 형성되고, 그 행방향 또는 열방향의 어느 피치가 교호로 반위상분만큼 편이해 있는 것을 특징으로 하는 회로 기판.
  5. 제3항에 있어서, 상기 기공은 상기 배선 금속막 아래에만 형성되어 있는 것을 특징으로 하는 회로 기판.
  6. 제4항에 있어서, 상기 기공은 상기 배선 금속막 아래에만 형성되어 있는 것을 특징으로 하는 회로 기판.
  7. 기판 베이스 상에 AIN, BN, 다이아몬드, 다이아몬드 라이크 카본, BeO 및 SiC로 이루어지는 군으로부터 선택되는 한 종류 이상으로 이루어지는 유전체막을 형성하는 공정, 상기 유전체막을 선택적으로 에칭 또는 천공함으로써 상기 유전체막의 표면에 개구부를 갖는 미소 구멍을 형성하는 공정, 상기 미소 구멍을 형성한 유전체막 상에 상기와 동일한 재료로 이루어지는 유전체막을 형성함으로써 상기 미소 구멍의 개구부를 폐쇄하여 5~95체적%의 기공율을 유전체막을 형성하는 공정, 및 상기와 같이 형성된 5~95체적%의 기공율을 갖는 유전체막 상에 배선 금속막을 형성하는 공정을 구비한 것을 특징으로 하는 회로 기판의 제조 방법.
  8. 제7항에 있어서, 상기 미소 구멍의 직경이 10㎛ 이하인 것을 특징으로 하는 기판의 제조 방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019940004963A 1993-03-15 1994-03-14 회로기판 및 그 제조방법 KR0153039B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP93-054350 1993-03-15
JP5435093 1993-03-15

Publications (2)

Publication Number Publication Date
KR940023323A true KR940023323A (ko) 1994-10-22
KR0153039B1 KR0153039B1 (ko) 1998-12-15

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KR (1) KR0153039B1 (ko)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100687394B1 (ko) * 2004-09-24 2007-02-27 산에이카가쿠 가부시키가이샤 다층회로기판과 그 제조방법

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5895263A (en) * 1996-12-19 1999-04-20 International Business Machines Corporation Process for manufacture of integrated circuit device
WO1998052227A1 (fr) * 1997-05-13 1998-11-19 Mitsubishi Denki Kabushiki Kaisha Element a couche mince dielectrique et son procede de fabrication
US5883219A (en) * 1997-05-29 1999-03-16 International Business Machines Corporation Integrated circuit device and process for its manufacture
US5844770A (en) * 1997-08-21 1998-12-01 K Systems Corporation Capacitor structures with dielectric coated conductive substrates
US6110649A (en) * 1997-11-19 2000-08-29 International Business Machines Corporation Process for manufacture of integrated circuit device
US6333141B1 (en) 1998-07-08 2001-12-25 International Business Machines Corporation Process for manufacture of integrated circuit device using inorganic/organic matrix comprising polymers of three dimensional architecture
US6093636A (en) * 1998-07-08 2000-07-25 International Business Machines Corporation Process for manufacture of integrated circuit device using a matrix comprising porous high temperature thermosets
US6399666B1 (en) 1999-01-27 2002-06-04 International Business Machines Corporation Insulative matrix material
JP2001247382A (ja) * 2000-03-06 2001-09-11 Ibiden Co Ltd セラミック基板
JPWO2004053984A1 (ja) * 2002-12-09 2006-04-13 株式会社豊田中央研究所 半導体素子放熱部材およびそれを用いた半導体装置ならびにその製造方法
US20050227079A1 (en) * 2004-04-13 2005-10-13 Ravi Kramadhati V Manufacture of porous diamond films
US20070035930A1 (en) * 2005-08-10 2007-02-15 Chien-Min Sung Methods and devices for cooling printed circuit boards
KR100781584B1 (ko) * 2006-06-21 2007-12-05 삼성전기주식회사 인쇄회로기판 및 그 제조방법
WO2008051187A1 (en) * 2006-08-11 2008-05-02 Kinik Company Methods and devices for cooling printed circuit boards
US20080048192A1 (en) * 2006-08-22 2008-02-28 Chien-Min Sung LED devices and associated methods
US20080144291A1 (en) * 2006-12-13 2008-06-19 Shao Chung Hu Methods and devices for cooling printed circuit boards
US8395318B2 (en) 2007-02-14 2013-03-12 Ritedia Corporation Diamond insulated circuits and associated methods
US8110846B2 (en) * 2007-05-31 2012-02-07 Chien-Min Sung Diamond semiconductor devices and associated methods
US20100111841A1 (en) * 2008-10-31 2010-05-06 Searete Llc Compositions and methods for surface abrasion with frozen particles
WO2010074127A1 (ja) * 2008-12-24 2010-07-01 株式会社大真空 圧電振動デバイス、圧電振動デバイスの製造方法、および圧電振動デバイスを構成する構成部材のエッチング方法
US10392959B2 (en) * 2012-06-05 2019-08-27 General Electric Company High temperature flame sensor
CN104869754B (zh) * 2014-02-25 2018-06-26 财团法人工业技术研究院 嵌有导线的软性基板及其制造方法
WO2018060247A1 (en) 2016-09-27 2018-04-05 At&S Austria Technologie & Systemtechnik Aktiengesellschaft Flame retardant structure for component carrier

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4880567A (en) * 1987-08-20 1989-11-14 General Electric Company Thick film copper conductor inks
JP3064409B2 (ja) * 1990-11-30 2000-07-12 株式会社日立製作所 保持装置およびそれを用いた半導体製造装置
JP3047256B2 (ja) * 1991-06-13 2000-05-29 株式会社豊田中央研究所 誘電体薄膜

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100687394B1 (ko) * 2004-09-24 2007-02-27 산에이카가쿠 가부시키가이샤 다층회로기판과 그 제조방법

Also Published As

Publication number Publication date
US5412160A (en) 1995-05-02
KR0153039B1 (ko) 1998-12-15

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