KR940002389B1 - Semiconductor leadframe - Google Patents

Semiconductor leadframe Download PDF

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Publication number
KR940002389B1
KR940002389B1 KR1019910006291A KR910006291A KR940002389B1 KR 940002389 B1 KR940002389 B1 KR 940002389B1 KR 1019910006291 A KR1019910006291 A KR 1019910006291A KR 910006291 A KR910006291 A KR 910006291A KR 940002389 B1 KR940002389 B1 KR 940002389B1
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KR
South Korea
Prior art keywords
lead
lead frame
adhesive tape
chip
pad
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KR1019910006291A
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Korean (ko)
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KR920020690A (en
Inventor
오세혁
정하천
Original Assignee
삼성전자 주식회사
김광호
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Application filed by 삼성전자 주식회사, 김광호 filed Critical 삼성전자 주식회사
Priority to KR1019910006291A priority Critical patent/KR940002389B1/en
Priority to JP4060294A priority patent/JPH05102388A/en
Publication of KR920020690A publication Critical patent/KR920020690A/en
Application granted granted Critical
Publication of KR940002389B1 publication Critical patent/KR940002389B1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Die Bonding (AREA)

Abstract

The semiconductor lead frame includes a lead frame pad supported by a support bar and above which a chip is attached; leads radially arranged from the pad and wire-bonded with the chip, wherein adhesive tape is attached on the bottom of the tip of the leads to be wire-bonded with the chip, the leads not attached by the adhesive tape are bent outward centering on the support bar to form a cavity, a slope surface and recesses are formed on the corners and edges of the pad, thereby preventing poor bonding.

Description

반도체 리이드 프레임Semiconductor lead frame

제1도는 종레의 반도체 리이드 프레임 구조도.1 is a schematic view of a semiconductor lead frame structure.

제2도는 종래의 와이어 본딩 공정 상태도.2 is a state diagram of a conventional wire bonding process.

제3도는 종래의 봉지수지 주입 공정 상태도.3 is a state diagram of a conventional encapsulation resin injection process.

제4도 이 발명에 따른 반도체 리이드 프레임 조도.4 is a semiconductor lead frame roughness according to the present invention.

제5도는 제 4도의 A부 상세도.5 is a detailed view of portion A of FIG.

제6도는 이 발명의 와이어 본딩 공정의 클램핑 상태도.6 is a clamping state diagram of the wire bonding process of the present invention.

제7도는 이 발명의 봉지수지 주입 공정 상태도.7 is a state diagram of the encapsulation resin injection process of the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

1 : 칩 2 : 리이드 프레임 패드1: chip 2: lead frame pad

2a: 경사면 2b : 홈2a: slope 2b: groove

3 : 서포트바 4 : 리이드3: support bar 4: lead

4a : 팁(Tip) 4b : 공간부4a: Tip 4b: Space

5 : 접착테이프 6 : 리이드 프레임5: adhesive tape 6: lead frame

7 : 히터 블록(Heater Block) 8 : 클램프7: Heater Block 8: Clamp

이 발명은 반도체 칩이 탑재되는 리이드 프레임에 관한 것으로서, 더욱 상세하게는 반도체 칩의 와이어 본딩 및 봉지수지 몰딩시 불량발생을 방지할 수 있는 반도체 리이드 프레임에 관한 것이다.The present invention relates to a lead frame on which a semiconductor chip is mounted, and more particularly, to a semiconductor lead frame capable of preventing defects during wire bonding and sealing resin molding of a semiconductor chip.

일반적으로 리이드 프레임의 패드상에 칩이 탑재되어 패키지 몰딩되는 반도체 장치는, 반도체 칩이 더욱 고집적화되고 대형화됨으로써 리이트 프레임의 리이드이 구조상 리이드가 쉽게 변형됨에 따라 와이어 본딩 및 봉지수지 몰딩시 제품 불량을 유발시켰던 것이다.In general, a semiconductor device in which a chip is mounted and packaged on a pad of a lead frame has a higher density and a larger size of the semiconductor chip, which leads to product defects in wire bonding and encapsulating resin molding as lead of the lead frame is easily deformed in structure. It was.

종래에는 상기 문제점을 해결하기 위한 방안으로써 제 1 도와 같이 서포트바(11)로 사각모서리가 지지된 리이드 프레임 패드(12)으이사방으로 리이드(13)들이 조밀하게 형성되고, 상기 리이드(13)상에 접착테이프(14)를 접착시켜 리이드(13)의 변형을 방지할 수 있도록 하였다. 그러나, 접착테이프(14)가 리이드(13)의 와이어 본딩부인 팁(Tip)(13a)에서 멀리 떨어진 곳에 접착되므로써 리이드(13)의변동이 완전하게 방지되지 못하여 와이어 본딩시 리이드(13)의 위치 변동으로 정확한 곳에 본딩할 수 없었고, 주변 리이드와 쇼트될 우려도 있는 제품불량을 해소하지 못했던 것이다. 그리고, 제2도에서와 같이 히터 블록(Heater Block)(15)상에 리이드 프레임(16)을 올려놓고 와이어 본딩할 때 플램프(17)로 리이드(13)를 위에서 눌러 고정하게 되는데, 리이드(13)의 팁(13a)부위가 히터 블록(15)에 밀착되도록 히터블록(15)에 형성한 단턱(15a)에 의해 리이드(13)의 "a"부가 손상을 입게 되었다.Conventionally, as a solution to the problem, leads 13 are densely formed around the lead frame pad 12 where the rectangular corners are supported by the support bar 11 as the first tile, and the lead 13 is formed on the lead 13. The adhesive tape 14 was adhered to each other to prevent deformation of the lead 13. However, since the adhesive tape 14 is glued away from the tip 13a, which is the wire bonding portion of the lead 13, the variation of the lead 13 is not completely prevented, and thus the position of the lead 13 during wire bonding. It could not bond to the exact location due to the change, and could not resolve the defective product which may be shorted with the surrounding lead. Then, as shown in FIG. 2, when the lead frame 16 is placed on the heater block 15 and wire-bonded, the lead 13 is pushed and fixed by the flange 17, and the lead ( The “a” portion of the lead 13 was damaged by the step 15a formed in the heater block 15 so that the tip 13a portion of the 13) was in close contact with the heater block 15.

또한, 제 3 도에서와 같이 와이어 본딩된 칩(18)을 봉지수지로 몰딩할때, 봉지수지가 주입구("b")를 통해 주입되어 유동되는 방향(화살표방향)이 리이드(13) 및 리이드 프레임 패드(12) 아래에서 위로 흐르게 되므로, 리이드(13) 및 리이드 프레임 패드(12) 저면이 압력을 받아 리이드(13) 및 리이드 프레임 패드(12)가 상측 또는 좌, 우로 휘게 되어 역시 불량을 유발시겼던 것이다.In addition, when molding the wire-bonded chip 18 into the encapsulation resin as shown in FIG. 3, the direction in which the encapsulation resin is injected through the injection hole "b" (arrow direction) is the lead 13 and the lead. Since the upper surface of the lead 13 and the lead frame pad 12 is pressed under the frame pad 12, the lead 13 and the lead frame pad 12 are bent upwards, leftwards, or rightwards, thereby causing a failure. It was sour.

이 발명은 상기의 문제점을 해결하기 위한 것으로서, 이 발명의 목적은, 리이드를 완전하게 고정시킬 수 있도록 접착테이프를 부착함으로써, 리이드의 변형으로 발생되는 제품불량 및 와이어 본딩시 히터블록에 의한 리이드의 손상을 방지할 수 있고, 봉지수지 몰딩시 리이드 및 리이드 프레임 패드가 저면에서 가해지는 압력에 의해 변형되지 않게 함으로써 제품의 불량을 방지하여 수율을 향상시킬 수 있는 반도체 리이드 프레임을 제공하는데 있다.The present invention is to solve the above problems, an object of the present invention, by attaching an adhesive tape so that the lead can be completely fixed, the defect of the product caused by the deformation of the lead and the lead by the heater block during wire bonding The present invention provides a semiconductor lead frame which can prevent damage and prevent the defect of a product by improving the yield by preventing the lead and the lead frame pad from being deformed by the pressure applied at the bottom when encapsulating resin molding.

상기의 목적을 달성하기 위한 이 발명의 특징은, 사각모서리가 서포트바에 의해 지지되고 상면에 칩이 부착되는 리이드 프레임 패드와, 상기 리이드 프레임 패드의 사방으로 배열 형성되어 칩과 와이어 본딩되는 리이드와 상기 리이드의 변형을 방지하도록 부착된 접착테이프로 이루어진 반도체 리이드 프레임에 있어서, 상기 칩과 와이어 본딩되는 리이드의 팁부위 저면에 접착테이프가 접착되고, 상기 접착테이프가 접착되지 않은 부위의 리이드가 서포트바를 중심으로 하여 바깥쪽으로 절곡되어 공간부가 형성되며, 서포트바로 지지되는 리이드 프레임 패드의 사각모서리부 및 가장자리에 경사면과 홈들을 형성하게 되는 반도체 리이드 프레임에 있다.A feature of the present invention for achieving the above object is, a rectangular frame is supported by the support bar and the chip is attached to the upper surface, the lead frame pad formed in all directions of the lead frame pad and the wire and the lead bonded to the In a semiconductor lead frame made of an adhesive tape attached to prevent deformation of a lead, an adhesive tape is adhered to a bottom surface of a tip of a lead bonded to the chip, and a lead at a portion where the adhesive tape is not bonded is centered on a support bar. In the semiconductor lead frame is bent outward to form a space portion, the inclined surface and the grooves are formed in the square corner portion and the edge of the lead frame pad supported by the support bar.

이하, 이 발명에 따른 실시예를 첨부도면에 의하여 상세하게 설명한다. 제4도 및 제5도는 이 발명에 따른 반도체 리이드 프레임(6)을 나차낸 것이고, 제6도 및 제7도는 이발명에 따른 반도체 리이드 프레임(6)의 와이어 본딩 공정 및 봉지수지 몰딩 공정 상태를 나타낸 것으로서, 상면에 반도체 칩(1)이 부착되는 리이드 프레임 패드92)의 모서리가 가이드레일(도시않은)과 연결된 서포트바(3)로서 연결되어 설치되고, 상기 리이드 프레임 패드(2)의 사방으로는 칩(1)과 와이어 본딩되는 리이드(4)들이 리이드 프레임 패드(2)와 소정간격 유지되도록 배열형성되며, 상기 리이드(4)의 와이어 본딩되는 팁(4a)부의 저면에 접착테이프(5)가 접착된다. 또한, 상기 리이드(4)는 접착테이프(5)를 접착하지 않은 일부 부위가 서포트바(3)를 중심으로 바깥측으로 절곡되어 공간부(4b)가 형성되고, 서포트바(3)가 연결되는 리이드 프레임 패드(2)의 사각모서리부에 경사면(2a)이 형성되며, 상기 리이드 프레임 패드(2)의 가장자리는 홈(2b)들이 형성된다.Hereinafter, embodiments according to the present invention will be described in detail with the accompanying drawings. 4 and 5 show the semiconductor lead frame 6 according to the present invention, and FIGS. 6 and 7 show the state of the wire bonding process and the encapsulating resin molding process of the semiconductor lead frame 6 according to the present invention. As shown, the edges of the lead frame pads 92 on which the semiconductor chips 1 are attached are connected and installed as support bars 3 connected to guide rails (not shown). The lead 4 wire-bonded with the chip 1 is arranged to be kept at a predetermined distance from the lead frame pad 2, and the adhesive tape 5 is attached to the bottom surface of the wire-bonded tip 4a of the lead 4. Is bonded. In addition, the lead 4 is a portion where the adhesive tape 5 is not bonded to the outer portion around the support bar 3 is bent to form a space portion (4b), the lead connecting the support bar (3) An inclined surface 2a is formed at a rectangular edge of the frame pad 2, and grooves 2b are formed at an edge of the lead frame pad 2.

이상에서와 같은 이 발명은 제4도에서와 같이, 접착테이프(5)가 리이드(4)의 팁(4a)부분의 저면에 부착되기 때문에 팁(4a)의 상면으로 와이어 본딩할 수 있게 되고, 리이드(4)의 끝단에 접착테이프(5)가 부착된 것이므로 리이드(4)가 변형되지 않게 된다 또한, 제6도에서와 같이, 리이드(4)의 팁(4a)과 칩(1)을 와이어 본딩함에 있어 리이드 프레임(6)을 히터블록(7)에 올려 놓으면, 리이드(4)의 팁(4a) 저면에 부착된 접착테이프(5)가 히터블록(7)의 단턱(7a)에 위치되므로 리이드(4)는 수평을 유지할 수 있어 정확한 위치에 와이어 본딩이 가능하게 되고, 상기 리이드(4)를 고정시키기 위해 클램프(8)로 누르게 되면, 접착테이프(5)가 하나의 완충작용을 하게 되므로 리이드(4)에 손상을 입히지 않게 되는 것이다.This invention as described above, as shown in Figure 4, since the adhesive tape 5 is attached to the bottom surface of the tip 4a portion of the lead 4, it is possible to wire bond to the upper surface of the tip 4a, Since the adhesive tape 5 is attached to the end of the lead 4, the lead 4 is not deformed. Also, as shown in FIG. 6, the tip 4a and the chip 1 of the lead 4 are wired. When the lead frame 6 is placed on the heater block 7 in bonding, the adhesive tape 5 attached to the bottom surface of the tip 4a of the lead 4 is located at the step 7a of the heater block 7. The lead 4 can be leveled to allow wire bonding at the correct position. When the lead 4 is pressed by the clamp 8 to fix the lead 4, the adhesive tape 5 acts as a buffer. The lead 4 will not be damaged.

한편, 제4도에서와 같이, 접착테이프(5)가 부착되지 않은 리이드(4)의 소정부위가 서포트바(3)를 중심으로 하여 바깥쪽으로 절곡됨으로써 형성된 공간부(4b)와, 서포트바(3)에 연결된 패드(2)의 모서리부에 형성된 경사면(2a) 가장자리에 형성된 홈(2b)들에 의해서는, 제7도에서와 같이 봉지수지가 리이드(4) 및 리이드 프레임 패드(2)의 하측에서 상측으로 유동될 때 공간부(4b)를 통해 유동되므로 그만큼 봉지수지의 유동이 원활해져 봉지수지의 유동시 리이드(4)의 저면에 발생하는 압력이 감소되는 것이고, 리이드 프레임 패드(2)의 경사면(2a)과 홈(2b)들을 통해서는 봉지수가 하측에서 상측으로 유동되므로 역시 리이드 프레임 패드(2)에 미치는 유동압력이 감소되는 것이다. 따라서, 리이드(4) 및 리이드 프레임 패드(2)가 봉지수지의 유동압력에 의해 상측으로 밀려 변형되는 일이 없게 되고, 이로인해 발생될 수 있는 제품불량이 방지되는 것이다.On the other hand, as shown in Fig. 4, the predetermined portion of the lead 4 to which the adhesive tape 5 is not attached is bent outwardly around the support bar 3, and the support bar ( By the grooves 2b formed at the edges of the inclined surface 2a formed at the corners of the pad 2 connected to 3), as shown in FIG. 7, the encapsulating resin is formed of the lead 4 and the lead frame pad 2. When flowing from the lower side to the upper side, it flows through the space portion 4b, so that the flow of the encapsulating resin is smooth, so that the pressure generated on the bottom surface of the lead 4 during the flow of the encapsulating resin is reduced, and the Since the sealing water flows from the lower side to the upper side through the inclined surfaces 2a and the grooves 2b, the flow pressure on the lead frame pad 2 is also reduced. Accordingly, the lead 4 and the lead frame pad 2 are not pushed upward by the flow pressure of the encapsulating resin, and thus the product defects that can be generated are prevented.

이상에서와 같이 이 발명에 따른 반도체 리이드 프레임에 의하면, 리이드의 변형이 방지되도록 하는 접착테이프가 리이드의 팁 저면에 부착됨으로써 와이어 본딩시 불량을 방지함과 동시에 와이어 본딩 능률이 향상되는 것이고, 리이드의 소정부위를 절곡하여 형성된 공간부와 리이드 프레임 패드의 모서리부 및 가장자리에 형성된 경사면 및 리이드 프레임 패드 가장자리에 형성된 홈들에 의해 봉지수지 몰딩시 리이드 및 리이드 프레임 패드 저면에 발생하는 압력이 감소되어 이로인한 불량이 방지되는 효과가 있는 것이다.As described above, according to the semiconductor lead frame according to the present invention, the adhesive tape which prevents the deformation of the lead is attached to the tip bottom of the lead, thereby preventing defects in wire bonding and improving wire bonding efficiency. Due to the space portion formed by bending a predetermined portion, the inclined surface formed at the corners and edges of the lead frame pad and the grooves formed at the edge of the lead frame pad, the pressure generated at the bottom of the lead and the lead frame pad during molding of the sealing resin is reduced. This is to prevent the effect.

Claims (1)

사각모서리가 서포트바에 의해 지지되고 상면에 칩이 부착되는 리이드 프레임 패드와, 상기 리이드 프레임 패드의 사방으로 배열형성되어 칩과 와이어 본딩되는 리이드와, 상기 리이드이 변형을 방지하도록 부착된 접착테이프로 이루어진 반도체 리이드 프레임에 있어서, 상기 칩과 와이어 본딩되는 리이드의 팁부위 저면에 접착테이프가 접착되고, 상기 접착테이프가 접착되지 않은 부위의 리이드가 서포트바를 중심으로 하여 바깥쪽으로 절곡되어 공간부가 형성되며, 서포트바로 지지되는 리이드 프레임 패드의 사각모서리부 및 가장자링 경사면과 홈들을 형성하여 됨을 측징으로 하는 반도체 리이드 프레임.A semiconductor comprising a lead frame pad having a square corner supported by a support bar and attached to a chip on an upper surface thereof, a lead arranged in all directions of the lead frame pad to bond the wire to the chip, and an adhesive tape attached to prevent the lead from being deformed. In the lead frame, an adhesive tape is adhered to the bottom of the tip of the lead bonded with the chip, and the lead of the portion where the adhesive tape is not bonded is bent outwardly around the support bar to form a space part. A semiconductor lead frame, characterized in that a rectangular corner portion of the lead frame pad supported, and an edge ring inclined surface and grooves are formed.
KR1019910006291A 1991-04-19 1991-04-19 Semiconductor leadframe KR940002389B1 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
KR1019910006291A KR940002389B1 (en) 1991-04-19 1991-04-19 Semiconductor leadframe
JP4060294A JPH05102388A (en) 1991-04-19 1992-03-17 Semiconductor lead frame

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019910006291A KR940002389B1 (en) 1991-04-19 1991-04-19 Semiconductor leadframe

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KR920020690A KR920020690A (en) 1992-11-21
KR940002389B1 true KR940002389B1 (en) 1994-03-24

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KR (1) KR940002389B1 (en)

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Publication number Priority date Publication date Assignee Title
US6489668B1 (en) * 1997-03-24 2002-12-03 Seiko Epson Corporation Semiconductor device and method for manufacturing the same

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KR920020690A (en) 1992-11-21
JPH05102388A (en) 1993-04-23

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