KR100268756B1 - A structure of seperat type diepad for leadframe - Google Patents

A structure of seperat type diepad for leadframe Download PDF

Info

Publication number
KR100268756B1
KR100268756B1 KR1019940034664A KR19940034664A KR100268756B1 KR 100268756 B1 KR100268756 B1 KR 100268756B1 KR 1019940034664 A KR1019940034664 A KR 1019940034664A KR 19940034664 A KR19940034664 A KR 19940034664A KR 100268756 B1 KR100268756 B1 KR 100268756B1
Authority
KR
South Korea
Prior art keywords
die pad
semiconductor chip
lead frame
pad structure
corners
Prior art date
Application number
KR1019940034664A
Other languages
Korean (ko)
Other versions
KR960026691A (en
Inventor
정관식
Original Assignee
마이클 디. 오브라이언
앰코 테크놀로지 코리아주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 마이클 디. 오브라이언, 앰코 테크놀로지 코리아주식회사 filed Critical 마이클 디. 오브라이언
Priority to KR1019940034664A priority Critical patent/KR100268756B1/en
Publication of KR960026691A publication Critical patent/KR960026691A/en
Application granted granted Critical
Publication of KR100268756B1 publication Critical patent/KR100268756B1/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE: A separate die pad structure of a lead frame is provided to absorb heat stress effectively by attaching four corners of a semiconductor chip on the die pad and to increase the contact size of the chip and molding compound. CONSTITUTION: The separate die pad structure of the lead frame includes a tie bar(TB). The tie bar is extended to the four corners of the die pad(SP) in a diagonal lines. Each of the die pad is coupled with the tie bars independently. The tie bars are different from one another and is manufactured independently. The shape of the each of the die pads is selected from a group consist of triangle, square, and Y-formation.

Description

리드프레임의 분리형 다이패드구조Separate die pad structure of lead frame

제1도는 종래의 리드프레임의 평면도.1 is a plan view of a conventional lead frame.

제2도는 본 발명의 제 1실시예에 따른 리드프레임의 분리형 다이패드구조를 도시한 평면도.2 is a plan view showing a detachable die pad structure of a lead frame according to a first embodiment of the present invention.

제3도는 본 발명의 제 2실시예에 따른 리드프레임의 분리형 다이패드구조를 도시한 평면도.3 is a plan view illustrating a detachable die pad structure of a lead frame according to a second embodiment of the present invention.

제4도는 본 발명의 제 3 실시예에 따른 리드프레임의 분리형 다이패드구조를 도시한 평면도.4 is a plan view showing a detachable die pad structure of a lead frame according to a third embodiment of the present invention.

〈도면의 주요부분에 대한 부호의 설명〉<Explanation of symbols for main parts of drawing>

TB : 타이바 Z : 반도체칩 탑재 영역TB: tie bar Z: semiconductor chip mounting area

SP : 분리형 다이패드SP: Detachable Die Pad

본 발명은 리드프레임의 분리형 다이패드구조에 관한 것이며, 더욱 상세하게는, 반도체 패키지 제조시의 고온 공정하 및 완성된 패키지의 반도체칩 작동시 반도체칩이 로딩(탑재)되는 다이패드를 분리형 구조로 형성함으로써 열적 스트레스를 효과적으로 흡수 또는 완화 시킴과 아울러, 반도체칩의 저면도 몰딩컴파운드와 직접 접촉케함으로써 반도체칩과 몰딩컴파운드 사이의 접촉 면적 확대를 통한 결합력을 향상시킬 수 있는 반도체 패키지용 리드프레임의 분리형 다이패드구조에 관한 것이다.The present invention relates to a detachable die pad structure of a lead frame, and more particularly, to a detachable structure of a die pad in which a semiconductor chip is loaded (loaded) during a high temperature process in manufacturing a semiconductor package and during operation of a semiconductor package of a completed package. Formation of the lead frame for semiconductor packages, which effectively absorbs or alleviates thermal stress, and directly contacts the bottom surface of the semiconductor chip with the molding compound, thereby improving the bonding force through the expansion of the contact area between the semiconductor chip and the molding compound. It relates to a die pad structure.

일반적으로 반도체 패키지의 제조공정에서는 리드프레임에 형성된 다이패드(DIE PAD)위에 접착층을 개재하여 반도체칩을 실장하는 반도체칩 실장 공정, 반도체칩과 리드를 전기적으로 연결하는 와이어 본딩 공정, 반도체칩과 와이어 등을 외부 환경으로부터 보호하기 위한 수지 봉지부를 형성하는 몰딩 공정, 수지 봉지부 외부로 노출된 외부 리드의 트림-폼 공정, 마킹 공정 등을 거쳐 반도체 패키지를 완성하게 된다.In general, a semiconductor package manufacturing process includes a semiconductor chip mounting process for mounting a semiconductor chip on a die pad formed in a lead frame through an adhesive layer, a wire bonding process for electrically connecting a semiconductor chip and a lead, and a semiconductor chip and a wire. The semiconductor package is completed through a molding process of forming a resin encapsulation part to protect the back from an external environment, a trim-form process of an external lead exposed to the outside of the resin encapsulation part, a marking process, and the like.

그러나, 종래에는 제 1 도에 도시한 바와 같이, 다이패드의 구조가 사각판상으로 형성되어 있으므로 그 상면에 반도체칩의 저면부 전체가 접착되며, 따라서 와이어 본딩 및 몰딩 공정 등과 같은 고온 공정의 수행시 또는 완성된 패키지의 반도체칩 작동시 금속재로 된 다이패드와 반도체칩간의 비교적 큰 열팽창 계수 차이로 인하여 상기한 다이패드가 열적 스트레스를 받게 되며, 이로 인하여 반도체칩과 다이패드의 접착 계면에서 박리 현상이나 크랙 발생 현상을 야기하기 쉬운 문제가 있었다.However, in the related art, as shown in FIG. 1, since the die pad has a rectangular plate shape, the entire bottom portion of the semiconductor chip is adhered to the upper surface thereof, and thus, at the time of performing a high temperature process such as a wire bonding and molding process. Alternatively, the die pad is subjected to thermal stress due to a relatively large difference in coefficient of thermal expansion between the metal die pad and the semiconductor chip during the operation of the semiconductor chip of the finished package, which causes peeling at the bonding interface between the semiconductor chip and the die pad. There was a problem that is likely to cause cracks.

이에 본 발명에서는 반도체칩이 탑재되는 다이패드를 타이바와 연결되는 네 모서리 부분으로 분리된 구조로 형성되어 있어서 실장되는 반도체칩의 저면중 네 모서리 부분만이 상기한 다이패드상에 접착되므로, 열적 스트레스를 효과적으로 흡수할 수 있음과 아울러, 반도체칩의 저면 네 모서리 부분을 제외한 영역이 몰딩 컴파운드과 직접 접촉하게 되므로 반도체칩과 몰딩 컴파운드 사이의 접촉 면적이 증대되어 반도체칩의 결합력이 강화될 수 있도록 한 것이다.In the present invention, since the die pad on which the semiconductor chip is mounted is formed in a structure divided into four corner parts connected to the tie bar, only four corner parts of the bottom surface of the semiconductor chip to be mounted are bonded onto the die pad. In addition, since the area of the semiconductor chip except for the four corners of the bottom of the semiconductor chip is in direct contact with the molding compound, the contact area between the semiconductor chip and the molding compound is increased to enhance the bonding force of the semiconductor chip.

이하, 본 발명을 첨부한 도면에 따라 더욱 상세히 설명하기로 한다.Hereinafter, the present invention will be described in more detail with reference to the accompanying drawings.

본 발명에 의하면, 다이패드의 네 모서리에 대각선상으로 연장되는 타이바를 갖는 반도체 패키지용 리드프레임에 있어서, 상기한 다이패드가 상기한 타이바와 각각 독립적으로 연결되어 상호 분리되어 독립적으로 구성되어 있는 것을 특징으로 하는 리드프레임의 분리형 다이패드구조가 제공되며, 이러한 분리형 다이패드구조에 의하여 일체형 다이패드구조에 비하여 우수한 열적 스트레스 완화능을 갖게 된다.According to the present invention, in the lead frame for a semiconductor package having a tie bar extending diagonally at four corners of the die pad, the die pads are independently connected to each other by the tie bars and are separated from each other. The detachable die pad structure of the lead frame is provided, and the detachable die pad structure provides excellent thermal stress relieving ability as compared to the integrated die pad structure.

상기한 본 발명의 독립적인 분리형 다이패드(SP)의 크기는 그 전체가 반도체칩을 충분히 지지할 수 있을 정도의 사이즈로 구성되며, 그 형상은 제 2도의 제 1실시예와 같은 삼각형, 제 4도의 제 3실시예와 같은 사각형, 제 3도의 제 2실시예와 같은 Y자형 등으로 만드는 것에 의해 반도체칩의 충분한 지지가 가능하면서도 반도체칩과의 첩촉면적이 최소화되도록 하고 있다.The independent detachable die pad SP of the present invention has a size that is large enough to fully support the semiconductor chip, and the shape is triangular and fourth as in the first embodiment of FIG. The rectangular shape as shown in the third embodiment of FIG. 3 and the Y-shape as shown in the second embodiment of FIG. 3 enable sufficient support of the semiconductor chip while minimizing the contact area with the semiconductor chip.

따라서, 제 2도에서 제 4도에 예시한 본 발명의 다이패드구조에 도시된 반도체칩 실장영역(Z)에 반도체칩을 탑재하게 되면, 반도체칩은 네 모서리 부분이 타이비(TB)와 연결된 각각의 다이패드(SP)에 지지되어 안정적으로 실장되며, 아울러 반도체칩의 네 모서리 부분을 제외한 대부분의 저면부가 노출되어 몰딩시 몰딩 컴파운드와 직접 접촉하여 결합되는 관계로 다이패드가 받는 열적 스트레스에 의한 반도체칩과의 접착 강도 약화 문제를 효과적으로 해소할 수 있음과 동시에, 몰딩 컴파운드와의 접촉 면적이 증대되어 결합력을 강화할 수 있는 등 반도체 패키지의 제조 과정중에서의 불량율을 최소화할 수 있는 효과가 있음과 아울러, 완성된 제품의 품질 및 신뢰도를 높일 수 있는 효과가 있다.Therefore, when the semiconductor chip is mounted in the semiconductor chip mounting region Z shown in the die pad structure of the present invention illustrated in FIGS. 2 and 4, the four corner portions of the semiconductor chip are connected to the tie TB. It is supported by each die pad SP and mounted stably, and most bottom parts except four corners of a semiconductor chip are exposed and are directly contacted with a molding compound during molding so that the die pad is caused by thermal stress. It can effectively solve the problem of weakening the adhesive strength with the semiconductor chip, and also increase the contact area with the molding compound to strengthen the bonding force, thereby minimizing the defect rate during the manufacturing process of the semiconductor package. This has the effect of increasing the quality and reliability of the finished product.

Claims (2)

다이패드의 네 모서리에 대각선상으로 연장되는 타이바를 갖는 반도체 패키지용 리드프레임에 있어서, 상기한 다이패드가 상기한 타이바와 각각 독립적으로 연결되어 상호 분리되어 독립적으로 구성되어 있는 것을 특징으로 하는 리드프레임의 분리형 다이패드구조.A lead frame for a semiconductor package having tie bars extending diagonally at four corners of a die pad, wherein the die pads are independently connected to each other by being connected to the tie bars and are separated from each other. Removable die pad structure. 제1항에 있어서, 상기한 각각의 독립적으로 구성되는 다이패드 개개의 형상이 삼각형, 사각형 및 Y자형으로 이루어지는 군으로부터 선택되는 어느 하나인 리드프레임의 분리형 다이패드구조.The separate die pad structure of a lead frame according to claim 1, wherein each of the independently formed die pads is any one selected from the group consisting of a triangle, a rectangle, and a Y-shape.
KR1019940034664A 1994-12-16 1994-12-16 A structure of seperat type diepad for leadframe KR100268756B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019940034664A KR100268756B1 (en) 1994-12-16 1994-12-16 A structure of seperat type diepad for leadframe

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019940034664A KR100268756B1 (en) 1994-12-16 1994-12-16 A structure of seperat type diepad for leadframe

Publications (2)

Publication Number Publication Date
KR960026691A KR960026691A (en) 1996-07-22
KR100268756B1 true KR100268756B1 (en) 2000-10-16

Family

ID=19401874

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019940034664A KR100268756B1 (en) 1994-12-16 1994-12-16 A structure of seperat type diepad for leadframe

Country Status (1)

Country Link
KR (1) KR100268756B1 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20220109916A (en) 2021-01-29 2022-08-05 목포대학교산학협력단 Safety fence with rotating device
KR20230077157A (en) 2021-11-25 2023-06-01 목포대학교산학협력단 Guardrail post using LED pannel

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100475335B1 (en) * 1997-08-12 2005-05-19 삼성전자주식회사 Semiconductor chip package
KR100384079B1 (en) * 1999-11-01 2003-05-14 앰코 테크놀로지 코리아 주식회사 Semiconductor package

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0424954A (en) * 1990-05-15 1992-01-28 Sharp Corp Lead frame

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0424954A (en) * 1990-05-15 1992-01-28 Sharp Corp Lead frame

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20220109916A (en) 2021-01-29 2022-08-05 목포대학교산학협력단 Safety fence with rotating device
KR20230077157A (en) 2021-11-25 2023-06-01 목포대학교산학협력단 Guardrail post using LED pannel

Also Published As

Publication number Publication date
KR960026691A (en) 1996-07-22

Similar Documents

Publication Publication Date Title
JP2820645B2 (en) Semiconductor lead frame
US7141867B2 (en) Quad flat non-leaded package
JPH0273660A (en) Lead frame for semiconductor device
US6495908B2 (en) Multi-chip semiconductor package
US5874783A (en) Semiconductor device having the inner end of connector leads displaced onto the surface of semiconductor chip
KR100268756B1 (en) A structure of seperat type diepad for leadframe
KR100364978B1 (en) Clamp and Heat Block for Wire Bonding in Semiconductor Package
JPH01161743A (en) Semiconductor device
JP3565114B2 (en) Resin-sealed semiconductor device
JP2885786B1 (en) Semiconductor device manufacturing method and semiconductor device
KR100373891B1 (en) Semiconductor device and method of its fabrication
US6949820B2 (en) Substrate-based chip package
JP3723324B2 (en) BGA type semiconductor device
KR200183066Y1 (en) Heat sink structure for manufacturing semiconductor packages
JP2937959B2 (en) Resin-sealed semiconductor device and method of manufacturing the same
JPH03163858A (en) Resin-sealed semiconductor device
KR0147638B1 (en) Semiconductor lead frame
KR19990006940A (en) Improved Lead Chip Bonding Structure for Semiconductor Devices and Leadframes Used therein
KR200160933Y1 (en) Lead frame of semiconductor package type
JP3805733B2 (en) Manufacturing method of semiconductor device
KR100345163B1 (en) Ball grid array package
JP2563507Y2 (en) Semiconductor device
KR200141125Y1 (en) Structure of lead frame
JP3664566B2 (en) Semiconductor device and manufacturing method thereof
JPS60171746A (en) Semiconductor device

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E701 Decision to grant or registration of patent right
N231 Notification of change of applicant
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20120706

Year of fee payment: 13

LAPS Lapse due to unpaid annual fee