KR930003368A - 반도체 집적 회로의 제조방법 - Google Patents

반도체 집적 회로의 제조방법 Download PDF

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Publication number
KR930003368A
KR930003368A KR1019920013484A KR920013484A KR930003368A KR 930003368 A KR930003368 A KR 930003368A KR 1019920013484 A KR1019920013484 A KR 1019920013484A KR 920013484 A KR920013484 A KR 920013484A KR 930003368 A KR930003368 A KR 930003368A
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KR
South Korea
Prior art keywords
oxide film
forming
electrode
lower electrode
thin film
Prior art date
Application number
KR1019920013484A
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English (en)
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KR0152098B1 (ko
Inventor
사또루 가네꼬
도시유끼 오꼬다
Original Assignee
이우에 사또시
상요덴기 가부시끼가이샤
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Application filed by 이우에 사또시, 상요덴기 가부시끼가이샤 filed Critical 이우에 사또시
Publication of KR930003368A publication Critical patent/KR930003368A/ko
Application granted granted Critical
Publication of KR0152098B1 publication Critical patent/KR0152098B1/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8248—Combination of bipolar and field-effect technology
    • H01L21/8249—Bipolar and MOS technology
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
    • H01L27/0635—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with bipolar transistors and diodes, or resistors, or capacitors

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Element Separation (AREA)
  • Formation Of Insulating Films (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

내용 없음.

Description

반도체 집적 회로의 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 발명을 설명하기 위한 제1단면도,
제2도는 본 발명을 설명하기 위한 제2단면도,
제3도는 본 발명을 설명하기 위한 제3단면도.

Claims (3)

  1. 소자 분리용 LOCOS 산화막을 형성하는 공정, 상기 LOCOS 산화막으로 둘러싸인 소자 영역에 게이트 전극을 형성하고 또 상기 LOCOS 산화막상에 용량 소자의 하부 전각을 형성하는 공정, 상기 게이트 전극과 하부 전극 상을 피복하는 산화막을 형성하는 공정, 상기 산화막에 각 소자의 확산 영역 표면을 상기 하부 전극 표면을 노출하는 접촉 구멍을 형성하고, 동시에 상기 하부 전극 표면의 대부분을 노출하는 구멍을 형성하는 공정, 전면에 유전체 박막을 형성하는 공정, 상기 하부 전극의 구멍을 피복하는 유전체 박막상에 레지스트 패턴을 형성하여 상기 접촉구멍 내의 바닥에 퇴적된 유전체 박막을 제거하도록 상기 유전체 박막을 제거하는 공정, 전면에 전극 재료를 피복하는 공정 및 상기 전극 재료를 패터닝하여 상기 유전체 박막을 피복하는 상부 전극, 상기 접촉 구멍을 통해 상기 하부 전극에 접촉하는 하부 전극 취출 전극 및 상기 각 확산 영역에 접촉하는 전극을 형성하는 공정을 포함하는 것을 특징으로 하는 반도체 집적 회로의 제조방법.
  2. 제1항에 있어서, 상기 반도체 박막이 실리콘 질화막인 것을 특징으로 하는 반도체 집적 회로의 제조방법.
  3. 제1항에 있어서, 상기 산화막이 BPSG막인 것을 특징으로 하는 반도체 집적 회로의 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019920013484A 1991-07-29 1992-07-28 반도체 집적 회로의 제조 방법 KR0152098B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP91-188859 1991-07-29
JP3188859A JP2630874B2 (ja) 1991-07-29 1991-07-29 半導体集積回路の製造方法

Publications (2)

Publication Number Publication Date
KR930003368A true KR930003368A (ko) 1993-02-24
KR0152098B1 KR0152098B1 (ko) 1998-10-01

Family

ID=16231111

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019920013484A KR0152098B1 (ko) 1991-07-29 1992-07-28 반도체 집적 회로의 제조 방법

Country Status (3)

Country Link
US (1) US5395782A (ko)
JP (1) JP2630874B2 (ko)
KR (1) KR0152098B1 (ko)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR940018967A (ko) * 1993-01-30 1994-08-19 오가 노리오 반도체장치 및 그 제조방법
CN1052341C (zh) * 1993-03-26 2000-05-10 松下电器产业株式会社 半导体器件及其制造方法
JPH08139273A (ja) * 1994-11-14 1996-05-31 Sony Corp 半導体集積回路および半導体装置
KR0167274B1 (ko) * 1995-12-07 1998-12-15 문정환 씨모스 아날로그 반도체장치와 그 제조방법
JP3326088B2 (ja) * 1996-03-14 2002-09-17 株式会社東芝 半導体装置およびその製造方法
FR2756100B1 (fr) 1996-11-19 1999-02-12 Sgs Thomson Microelectronics Transistor bipolaire a emetteur inhomogene dans un circuit integre bicmos
FR2756103B1 (fr) * 1996-11-19 1999-05-14 Sgs Thomson Microelectronics Fabrication de circuits integres bipolaires/cmos et d'un condensateur
FR2757683B1 (fr) * 1996-12-20 1999-03-05 Sgs Thomson Microelectronics Transistor bipolaire et capacite
US6124199A (en) 1999-04-28 2000-09-26 International Business Machines Corporation Method for simultaneously forming a storage-capacitor electrode and interconnect
US6440811B1 (en) * 2000-12-21 2002-08-27 International Business Machines Corporation Method of fabricating a poly-poly capacitor with a SiGe BiCMOS integration scheme

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5846666A (ja) * 1981-09-14 1983-03-18 Seiko Epson Corp 半導体装置の製造方法
US4441249A (en) * 1982-05-26 1984-04-10 Bell Telephone Laboratories, Incorporated Semiconductor integrated circuit capacitor
US5108941A (en) * 1986-12-05 1992-04-28 Texas Instrument Incorporated Method of making metal-to-polysilicon capacitor
NL8701357A (nl) * 1987-06-11 1989-01-02 Philips Nv Halfgeleiderinrichting bevattende een condensator en een begraven passiveringslaag.
CA2010742A1 (en) * 1989-03-03 1990-09-03 Kenji Koga Azacyclooctadiene compound and pharmaceutical use

Also Published As

Publication number Publication date
KR0152098B1 (ko) 1998-10-01
US5395782A (en) 1995-03-07
JP2630874B2 (ja) 1997-07-16
JPH0536901A (ja) 1993-02-12

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