KR930000768B1 - 반도체 기억장치 - Google Patents

반도체 기억장치 Download PDF

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Publication number
KR930000768B1
KR930000768B1 KR1019890017063A KR890017063A KR930000768B1 KR 930000768 B1 KR930000768 B1 KR 930000768B1 KR 1019890017063 A KR1019890017063 A KR 1019890017063A KR 890017063 A KR890017063 A KR 890017063A KR 930000768 B1 KR930000768 B1 KR 930000768B1
Authority
KR
South Korea
Prior art keywords
bit line
data
signal
memory cell
level
Prior art date
Application number
KR1019890017063A
Other languages
English (en)
Korean (ko)
Other versions
KR900012270A (ko
Inventor
도시유끼 오가와
Original Assignee
미쓰비시 뎅끼 가부시끼가이샤
시기 모리야
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 미쓰비시 뎅끼 가부시끼가이샤, 시기 모리야 filed Critical 미쓰비시 뎅끼 가부시끼가이샤
Publication of KR900012270A publication Critical patent/KR900012270A/ko
Application granted granted Critical
Publication of KR930000768B1 publication Critical patent/KR930000768B1/ko

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1006—Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1075—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers for multiport memories each having random access ports and serial ports, e.g. video RAM

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Semiconductor Memories (AREA)
KR1019890017063A 1989-01-07 1989-11-23 반도체 기억장치 KR930000768B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP1001625A JP2993671B2 (ja) 1989-01-07 1989-01-07 半導体記憶装置
JP1-1625 1989-01-07

Publications (2)

Publication Number Publication Date
KR900012270A KR900012270A (ko) 1990-08-03
KR930000768B1 true KR930000768B1 (ko) 1993-02-01

Family

ID=11506718

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019890017063A KR930000768B1 (ko) 1989-01-07 1989-11-23 반도체 기억장치

Country Status (3)

Country Link
US (1) US5544093A (ja)
JP (1) JP2993671B2 (ja)
KR (1) KR930000768B1 (ja)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0821233B2 (ja) 1990-03-13 1996-03-04 株式会社東芝 画像メモリおよび画像メモリからデータを読み出す方法
US5687132A (en) * 1995-10-26 1997-11-11 Cirrus Logic, Inc. Multiple-bank memory architecture and systems and methods using the same
JPH1031886A (ja) * 1996-07-17 1998-02-03 Nec Corp ランダムアクセスメモリ
US6388931B1 (en) * 1999-02-25 2002-05-14 Micron Technology, Inc. Dummy wordline for controlling the timing of the firing of sense amplifiers in a memory device in relation to the firing of wordlines in the memory device
US7903678B2 (en) * 2004-12-13 2011-03-08 Bt Ins, Inc. Internet protocol address management system and method
US7623547B2 (en) * 2004-12-13 2009-11-24 Bt Ins, Inc. Internet protocol address management system and method
US7746701B2 (en) * 2008-01-10 2010-06-29 Micron Technology, Inc. Semiconductor memory device having bit line pre-charge unit separated from data register

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4347587A (en) * 1979-11-23 1982-08-31 Texas Instruments Incorporated Semiconductor integrated circuit memory device with both serial and random access arrays
US4616310A (en) * 1983-05-20 1986-10-07 International Business Machines Corporation Communicating random access memory
JPS59223994A (ja) * 1983-06-03 1984-12-15 Hitachi Ltd ダイナミツク型ｒａｍ
US4729119A (en) * 1984-05-21 1988-03-01 General Computer Corporation Apparatus and methods for processing data through a random access memory system
JPS6148200A (ja) * 1984-08-14 1986-03-08 Fujitsu Ltd 半導体記憶装置
JPS61160898A (ja) * 1985-01-05 1986-07-21 Fujitsu Ltd 半導体記憶装置
US4731758A (en) * 1985-06-21 1988-03-15 Advanced Micro Devices, Inc. Dual array memory with inter-array bi-directional data transfer
US4796222A (en) * 1985-10-28 1989-01-03 International Business Machines Corporation Memory structure for nonsequential storage of block bytes in multi-bit chips
JPS62194561A (ja) * 1986-02-21 1987-08-27 Toshiba Corp 半導体記憶装置
JPS62231495A (ja) * 1986-03-31 1987-10-12 Toshiba Corp 半導体記憶装置
JPS62252590A (ja) * 1986-04-24 1987-11-04 Ascii Corp メモリ装置
JPS62287497A (ja) * 1986-06-06 1987-12-14 Fujitsu Ltd 半導体記憶装置
JPH0740430B2 (ja) * 1986-07-04 1995-05-01 日本電気株式会社 メモリ装置
JPS6353579A (ja) * 1986-08-23 1988-03-07 Canon Inc 現像装置
JPS63104296A (ja) * 1986-10-21 1988-05-09 Nec Corp 半導体記憶装置
JPS63225990A (ja) * 1987-03-16 1988-09-20 Hitachi Ltd 半導体記憶装置
JPS63259893A (ja) * 1987-04-16 1988-10-26 Sony Corp メモリ装置
US4875196A (en) * 1987-09-08 1989-10-17 Sharp Microelectronic Technology, Inc. Method of operating data buffer apparatus
JPS6468851A (en) * 1987-09-09 1989-03-14 Nippon Electric Ic Microcomput Semiconductor integrated circuit
JPH0760595B2 (ja) * 1988-01-12 1995-06-28 日本電気株式会社 半導体メモリ
US4891794A (en) * 1988-06-20 1990-01-02 Micron Technology, Inc. Three port random access memory
US5138705A (en) * 1989-06-26 1992-08-11 International Business Machines Corporation Chip organization for an extendable memory structure providing busless internal page transfers

Also Published As

Publication number Publication date
KR900012270A (ko) 1990-08-03
JP2993671B2 (ja) 1999-12-20
JPH02183488A (ja) 1990-07-18
US5544093A (en) 1996-08-06

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