KR920010899A - 반도체 메모리 셀 제조방법 - Google Patents
반도체 메모리 셀 제조방법Info
- Publication number
- KR920010899A KR920010899A KR1019900018367A KR900018367A KR920010899A KR 920010899 A KR920010899 A KR 920010899A KR 1019900018367 A KR1019900018367 A KR 1019900018367A KR 900018367 A KR900018367 A KR 900018367A KR 920010899 A KR920010899 A KR 920010899A
- Authority
- KR
- South Korea
- Prior art keywords
- memory cell
- semiconductor memory
- cell manufacturing
- manufacturing
- semiconductor
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Semiconductor Memories (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019900018367A KR930008585B1 (ko) | 1990-11-13 | 1990-11-13 | 반도체 메모리 셀 제조방법 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019900018367A KR930008585B1 (ko) | 1990-11-13 | 1990-11-13 | 반도체 메모리 셀 제조방법 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR920010899A true KR920010899A (ko) | 1992-06-27 |
KR930008585B1 KR930008585B1 (ko) | 1993-09-09 |
Family
ID=19305993
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019900018367A KR930008585B1 (ko) | 1990-11-13 | 1990-11-13 | 반도체 메모리 셀 제조방법 |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR930008585B1 (ko) |
-
1990
- 1990-11-13 KR KR1019900018367A patent/KR930008585B1/ko not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR930008585B1 (ko) | 1993-09-09 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
G160 | Decision to publish patent application | ||
G160 | Decision to publish patent application | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20020820 Year of fee payment: 10 |
|
LAPS | Lapse due to unpaid annual fee |