KR910012884A - Keypad switch input system - Google Patents

Keypad switch input system Download PDF

Info

Publication number
KR910012884A
KR910012884A KR1019890019706A KR890019706A KR910012884A KR 910012884 A KR910012884 A KR 910012884A KR 1019890019706 A KR1019890019706 A KR 1019890019706A KR 890019706 A KR890019706 A KR 890019706A KR 910012884 A KR910012884 A KR 910012884A
Authority
KR
South Korea
Prior art keywords
data
switch
row
input system
keypad
Prior art date
Application number
KR1019890019706A
Other languages
Korean (ko)
Other versions
KR940009743B1 (en
Inventor
최상대
Original Assignee
이헌조
주식회사 금성사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 이헌조, 주식회사 금성사 filed Critical 이헌조
Priority to KR89019706A priority Critical patent/KR940009743B1/en
Publication of KR910012884A publication Critical patent/KR910012884A/en
Application granted granted Critical
Publication of KR940009743B1 publication Critical patent/KR940009743B1/en

Links

Landscapes

  • Input From Keyboards Or The Like (AREA)

Abstract

내용 없음.No content.

Description

키패드 스위치 입력 시스템Keypad switch input system

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제1도는 본 발명의 키패드 스위치 입력 시스템 구성도.1 is a block diagram of the keypad switch input system of the present invention.

제2도는 제1도에 대한 신호흐름도.2 is a signal flow diagram for FIG.

Claims (2)

캐패드 스위치 입력 시스템에 있어서, 마이크로프로세서(1)가 키패드스위치(7)로부터 데이타를 받아 들이기 위하여, 그 캐패드스위치(7)의 각 행(ROW)의 데이타를 읽어들이기 위한 버퍼(2)와, 상기 키패드스위치(7)로부터 각 열의 데이타를 출력하기 위한 데이타래치(3)와, 상기 캐패드스위치(7)가 세팅되지 않았을때 각 행의 데이타값을 하이(H) 데이타값으로 유지하기 위해 전원단자(Vcc)와 연결된 매트릭스 저항(6)과, 그 데이타래치(3)와 버퍼(2)를 지정하기 이한 디코더(4)와, 상기 키패스스위치(7)의 어느한 키가 세팅도었을때 이를 마이크로프로세서(1)에 알리기 위해 버스입출력단자(BIO)와 연결되는 앤드게이트(5)로 구성한 것을 특징으로 한 캐패트 스위치 입력 시스템.In the pad switch input system, the microprocessor (1) and the buffer (2) for reading the data of each row (ROW) of the pad switch (7) in order to receive data from the keypad switch (7); A data latch (3) for outputting data of each column from the keypad switch (7), and to maintain a data value of each row at a high (H) data value when the pad switch (7) is not set. The matrix resistor 6 connected to the power supply terminal Vcc, the decoder 4 to designate the data latch 3 and the buffer 2, and any key of the key path switch 7 may be set. Capacitor switch input system, characterized in that consisting of an end gate (5) connected to the bus input and output terminals (BIO) to inform the microprocessor (1) when. 상기 마이크로프로세서(1)는 키패드스위치(7)의 어느키가 세팅되었는가를 알기 위하여 데이타래치(3)의 출력(Q0)을 로우(L)로하고, 출력(Q1)(Q2)는 하이(H)로 하여 키패드스위치(7)의 첫번째 열을 제로로 한 후 버퍼(2)을 통하여 각행의 데이타를 읽었을 어느하나의 값이 로우(L)이면 키디파인을 하고, 각 행의 데이타가 모두 하이(H)이면 두번째 열을 제로로 한 것을 특징으로 한 키패드 스위치 입력 시스템.The microprocessor 1 sets the output Q0 of the data latch 3 low (L) to know which key of the keypad switch 7 is set, and the outputs Q1 (Q2) are high (H). ). If the first column of the keypad switch 7 is zero, and one of the values that reads each row of data through the buffer 2 is low (L), then the key is fine, and the data of each row is all high ( H), the keypad switch input system characterized in that the second row to zero. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR89019706A 1989-12-27 1989-12-27 Key-pad switch input system KR940009743B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR89019706A KR940009743B1 (en) 1989-12-27 1989-12-27 Key-pad switch input system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR89019706A KR940009743B1 (en) 1989-12-27 1989-12-27 Key-pad switch input system

Publications (2)

Publication Number Publication Date
KR910012884A true KR910012884A (en) 1991-08-08
KR940009743B1 KR940009743B1 (en) 1994-10-17

Family

ID=19293812

Family Applications (1)

Application Number Title Priority Date Filing Date
KR89019706A KR940009743B1 (en) 1989-12-27 1989-12-27 Key-pad switch input system

Country Status (1)

Country Link
KR (1) KR940009743B1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100442370B1 (en) * 2002-07-25 2004-07-30 엘지전자 주식회사 Key scan apparatus and method for mobile communication terminal

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100442370B1 (en) * 2002-07-25 2004-07-30 엘지전자 주식회사 Key scan apparatus and method for mobile communication terminal

Also Published As

Publication number Publication date
KR940009743B1 (en) 1994-10-17

Similar Documents

Publication Publication Date Title
KR850003610A (en) Semiconductor memory device
KR850002911A (en) Single chip microcomputer
KR850001566A (en) Micro computer
KR840001410A (en) Programmable Logic Units
KR910012884A (en) Keypad switch input system
KR870007511A (en) Data reading circuit
KR960026651A (en) Fusing system
KR910005293A (en) Integrated device with bidirectional input / output structure
SU943693A1 (en) Data input device
KR930006379B1 (en) Circuit for changing address in personal computer
KR910012969A (en) Bidirectional parallel port
KR970076207A (en) Input stage circuit of Micro-Procesor
KR960007955Y1 (en) Interrupt input apparatus of plc
KR890006041A (en) Tone decoder
KR920013103A (en) 3-terminal read / 2-terminal write register Specific register zero value read circuit of file
KR920004978A (en) Address Expansion Method Using I / O Function of Microprocessor
KR880008174A (en) Interrupt processing control circuit that processes multiple interrupt signals with one interrupt terminal
KR880005802A (en) Teletext secret page information signal sorting circuit
KR920003714A (en) Output path occupancy indicating device of space division exchange
JPS61143808A (en) Bit modify circuit of sequence control device
KR910007282A (en) Counter circuit for circuit test
KR910010875A (en) Logic circuit
KR920010447A (en) Data loss prevention circuit between CPUs using dual port RAM
KR910010325A (en) Data transmission system using personal computer
KR880008156A (en) Dual Port Memory Control Circuit

Legal Events

Date Code Title Description
A201 Request for examination
G160 Decision to publish patent application
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 19971229

Year of fee payment: 5

LAPS Lapse due to unpaid annual fee