KR890006041A - Tone decoder - Google Patents
Tone decoder Download PDFInfo
- Publication number
- KR890006041A KR890006041A KR870010709A KR870010709A KR890006041A KR 890006041 A KR890006041 A KR 890006041A KR 870010709 A KR870010709 A KR 870010709A KR 870010709 A KR870010709 A KR 870010709A KR 890006041 A KR890006041 A KR 890006041A
- Authority
- KR
- South Korea
- Prior art keywords
- frequency
- decoder
- unit
- output
- cadence
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04M—TELEPHONIC COMMUNICATION
- H04M3/00—Automatic or semi-automatic exchanges
- H04M3/22—Arrangements for supervision, monitoring or testing
Landscapes
- Engineering & Computer Science (AREA)
- Signal Processing (AREA)
- Telephone Function (AREA)
- Telephonic Communication Services (AREA)
- Executing Machine-Instructions (AREA)
Abstract
내용 없음No content
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.
제1도는 본 발명의 톤 디코더의 블록도.1 is a block diagram of a tone decoder of the present invention.
제2도는 제1도의 실시예를 도시한 상세회로도.2 is a detailed circuit diagram showing the embodiment of FIG.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
100 : 카덴스 디코더부(Cadence Decoder)100: cadence decoder (Cadence Decoder)
200 : 주파수 디코더부(Frequency Decoder)200: frequency decoder unit (Frequency Decoder)
300 : 주파수 조합부300: frequency combination unit
400 : 데이타 인지부 500 : 출력버퍼부400: data recognition unit 500: output buffer unit
Claims (4)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019870010709A KR900004468B1 (en) | 1987-09-26 | 1987-09-26 | Tone decoder in exchanges |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019870010709A KR900004468B1 (en) | 1987-09-26 | 1987-09-26 | Tone decoder in exchanges |
Publications (2)
Publication Number | Publication Date |
---|---|
KR890006041A true KR890006041A (en) | 1989-05-18 |
KR900004468B1 KR900004468B1 (en) | 1990-06-28 |
Family
ID=19264766
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019870010709A KR900004468B1 (en) | 1987-09-26 | 1987-09-26 | Tone decoder in exchanges |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR900004468B1 (en) |
-
1987
- 1987-09-26 KR KR1019870010709A patent/KR900004468B1/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR900004468B1 (en) | 1990-06-28 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR900005264A (en) | Clock Signal Switching Circuit and Its Switching Method | |
KR850003610A (en) | Semiconductor memory device | |
KR880009381A (en) | Semiconductor integrated circuit device | |
KR840001410A (en) | Programmable Logic Units | |
KR890011221A (en) | Digital Phase Comparison Circuit | |
KR890006041A (en) | Tone decoder | |
KR870009382A (en) | Latch circuit with two hold loops | |
KR840002174A (en) | Switch circuit | |
KR910021050A (en) | Decoder circuit | |
KR890017658A (en) | ADSR data output control system of electronic musical instrument | |
KR910014785A (en) | Integrated circuit device | |
KR890007290A (en) | Semiconductor memory device with level converter | |
KR910012884A (en) | Keypad switch input system | |
KR940007700A (en) | Mouse and Keyboard Compatible Devices | |
KR870005392A (en) | Master latch circuit | |
KR930020843A (en) | Clock signal selection circuit | |
KR890006031A (en) | Space switch of electronic exchange | |
KR920004972A (en) | Chip Enable Signal Control Circuit of Dual Port Memory Devices | |
KR880008174A (en) | Interrupt processing control circuit that processes multiple interrupt signals with one interrupt terminal | |
KR910010507A (en) | Semiconductor devices | |
KR880005527A (en) | Recovery time control circuit | |
KR890007502A (en) | Test Logic Circuit Using Counter | |
KR910003503A (en) | Memory Capacity Expansion Unit | |
KR910005293A (en) | Integrated device with bidirectional input / output structure | |
KR940012838A (en) | Switching circuit where input and output signals are implemented on the same terminal |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
N231 | Notification of change of applicant | ||
G160 | Decision to publish patent application | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20020527 Year of fee payment: 13 |
|
LAPS | Lapse due to unpaid annual fee |