KR930020843A - Clock signal selection circuit - Google Patents
Clock signal selection circuit Download PDFInfo
- Publication number
- KR930020843A KR930020843A KR1019920003642A KR920003642A KR930020843A KR 930020843 A KR930020843 A KR 930020843A KR 1019920003642 A KR1019920003642 A KR 1019920003642A KR 920003642 A KR920003642 A KR 920003642A KR 930020843 A KR930020843 A KR 930020843A
- Authority
- KR
- South Korea
- Prior art keywords
- clock
- selection circuit
- clock signal
- signal selection
- decoder
- Prior art date
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Abstract
클럭신호 선택회로는 컴퓨터등의 장치가 2이상의 크럭을 가지는 경우에 프로그램에 의하여 1클럭을 선택하여 사용할 수 있게하는 회로이다. 상이한 클럭속도를 가지는 2이상의 클럭을 갖추고 있는 장치에 있어서, 클럭신호 선택회로는 외부로부터 수신된 클럭선택신호를 저장하는 레지스터, 레지스터로부터의 클럭선택신호 출력을 디코딩하기 위한 디코더, 클럭의 출력단자에 접속되며 디코더의 출력단자에 각각 접속되는 버퍼수단을 포함한다.The clock signal selection circuit is a circuit that allows one clock to be selected and used by a program when a device such as a computer has two or more clocks. In an apparatus having two or more clocks having different clock speeds, the clock signal selection circuit includes a register for storing a clock selection signal received from an external device, a decoder for decoding a clock selection signal output from the register, and a clock output terminal. And buffer means connected to each output terminal of the decoder.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제1도는 본 발명에 따른 클럭신호 선택회로의 회로도.1 is a circuit diagram of a clock signal selection circuit according to the present invention.
제2도는 본 발명에 따른 클럭신호 선택회로의 제2실시예이다.2 is a second embodiment of a clock signal selection circuit according to the present invention.
Claims (1)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019920003642A KR930020843A (en) | 1992-03-05 | 1992-03-05 | Clock signal selection circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019920003642A KR930020843A (en) | 1992-03-05 | 1992-03-05 | Clock signal selection circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
KR930020843A true KR930020843A (en) | 1993-10-20 |
Family
ID=67257244
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019920003642A KR930020843A (en) | 1992-03-05 | 1992-03-05 | Clock signal selection circuit |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR930020843A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100238717B1 (en) * | 1993-10-13 | 2000-01-15 | 가와까미게에 | Cosmetic material container |
-
1992
- 1992-03-05 KR KR1019920003642A patent/KR930020843A/en not_active Application Discontinuation
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100238717B1 (en) * | 1993-10-13 | 2000-01-15 | 가와까미게에 | Cosmetic material container |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
E601 | Decision to refuse application |