KR910005403A - 플라즈마에싱방법 - Google Patents
플라즈마에싱방법 Download PDFInfo
- Publication number
- KR910005403A KR910005403A KR1019900013452A KR900013452A KR910005403A KR 910005403 A KR910005403 A KR 910005403A KR 1019900013452 A KR1019900013452 A KR 1019900013452A KR 900013452 A KR900013452 A KR 900013452A KR 910005403 A KR910005403 A KR 910005403A
- Authority
- KR
- South Korea
- Prior art keywords
- plasma ashing
- container
- ashing method
- high frequency
- frequency power
- Prior art date
Links
- 238000004380 ashing Methods 0.000 title claims description 6
- 238000000034 method Methods 0.000 title description 2
- 239000000758 substrate Substances 0.000 claims description 2
- 239000005416 organic matter Substances 0.000 claims 1
- 238000007789 sealing Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02057—Cleaning during device manufacture
- H01L21/02068—Cleaning during device manufacture during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers
- H01L21/02071—Cleaning during device manufacture during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers the processing being a delineation, e.g. RIE, of conductive layers
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/26—Processing photosensitive materials; Apparatus therefor
- G03F7/42—Stripping or agents therefor
- G03F7/427—Stripping or agents therefor using plasma means only
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31127—Etching organic layers
- H01L21/31133—Etching organic layers by chemical means
- H01L21/31138—Etching organic layers by chemical means by dry-etching
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- General Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Chemical & Material Sciences (AREA)
- Plasma & Fusion (AREA)
- Drying Of Semiconductors (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
Abstract
내용 없음.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 본 실시예로 플라즈마에싱(plasma ashing) 처리공정에 있어서의 반도체기판의 변화를 도시한 도면.
제2(a)도는 챔버측면적과 고주파전력의 관계에 기초해서 레지스트잔사의 유무를 도시한 도면.
제2도(b)도는 챔버측면적과 고주파전력의 비에 대한 레지스트잔사발생의 유무를 도시한 도면.
제3(a)도 및 제3(b)도는 플라즈마에싱장치의 구조도.
Claims (1)
- 유기물이 부착된 기판(21)을 용기내에 설치하는 공정과, 상기 용기를 밀폐하고 그 용기내를 진공상태로 하는 공정, 진공상태로 된 상기 용기내에 플라즈마에싱기체를 충전하는 공정, 상기 충전된 플라즈마에싱기체에 고주파전력을 인가해서 플라즈마에싱을 행하는 공정을 갖추고, 상기 고주파전력은 상기 용기내부에 측면적에 대해 0.01W/cm2이하의 조건에서 인가되는 것을 특징으로 하는 플라즈마에싱방법.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1221687A JPH0744176B2 (ja) | 1989-08-30 | 1989-08-30 | プラズマアッシング方法 |
JP89-221687 | 1989-08-30 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR910005403A true KR910005403A (ko) | 1991-03-30 |
KR930003876B1 KR930003876B1 (ko) | 1993-05-14 |
Family
ID=16770707
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019900013452A KR930003876B1 (ko) | 1989-08-30 | 1990-08-30 | 플라즈마에싱방법 |
Country Status (3)
Country | Link |
---|---|
US (1) | US5294292A (ko) |
JP (1) | JPH0744176B2 (ko) |
KR (1) | KR930003876B1 (ko) |
Families Citing this family (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7264850B1 (en) | 1992-12-28 | 2007-09-04 | Semiconductor Energy Laboratory Co., Ltd. | Process for treating a substrate with a plasma |
US6001431A (en) * | 1992-12-28 | 1999-12-14 | Semiconductor Energy Laboratory Co., Ltd. | Process for fabricating a magnetic recording medium |
JPH07221075A (ja) * | 1994-02-03 | 1995-08-18 | Fujitsu Ltd | アッシング処理方法 |
US5811022A (en) | 1994-11-15 | 1998-09-22 | Mattson Technology, Inc. | Inductive plasma reactor |
JPH0936308A (ja) * | 1995-07-14 | 1997-02-07 | Matsushita Electron Corp | 半導体装置の製造方法 |
US5726102A (en) * | 1996-06-10 | 1998-03-10 | Vanguard International Semiconductor Corporation | Method for controlling etch bias in plasma etch patterning of integrated circuit layers |
US5776832A (en) * | 1996-07-17 | 1998-07-07 | Taiwan Semiconductor Manufacturing Company Ltd. | Anti-corrosion etch process for etching metal interconnections extending over and within contact openings |
US6379576B2 (en) | 1997-11-17 | 2002-04-30 | Mattson Technology, Inc. | Systems and methods for variable mode plasma enhanced processing of semiconductor wafers |
JP3102409B2 (ja) * | 1998-04-30 | 2000-10-23 | 日本電気株式会社 | 配線の形成方法及びプラズマアッシング装置 |
US20050022839A1 (en) * | 1999-10-20 | 2005-02-03 | Savas Stephen E. | Systems and methods for photoresist strip and residue treatment in integrated circuit manufacturing |
US6805139B1 (en) | 1999-10-20 | 2004-10-19 | Mattson Technology, Inc. | Systems and methods for photoresist strip and residue treatment in integrated circuit manufacturing |
JP4683685B2 (ja) * | 2000-01-17 | 2011-05-18 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法、フラッシュメモリの製造方法、およびスタティックランダムアクセスメモリの製造方法 |
DE10017512A1 (de) * | 2000-04-10 | 2001-10-18 | Atec Weiss Gmbh & Co Kg | Ringlamelle für flexible Wellenkupplungen, aus solchen Ringlamellen gebildetes Lamellenpaket und flexible Wellenkupplung mit solchen Ringlamellen |
US7232767B2 (en) * | 2003-04-01 | 2007-06-19 | Mattson Technology, Inc. | Slotted electrostatic shield modification for improved etch and CVD process uniformity |
US20070186953A1 (en) * | 2004-07-12 | 2007-08-16 | Savas Stephen E | Systems and Methods for Photoresist Strip and Residue Treatment in Integrated Circuit Manufacturing |
DE102011051434A1 (de) | 2011-06-29 | 2013-01-03 | Huf Hülsbeck & Fürst Gmbh & Co. Kg | Kapazitive Sensoranordnung und Verfahren zur Erfassung von Betätigungsgesten an einem Kraftfahrzeug |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4474621A (en) * | 1982-06-16 | 1984-10-02 | International Telephone And Telegraph Corporation | Method for low temperature ashing in a plasma |
-
1989
- 1989-08-30 JP JP1221687A patent/JPH0744176B2/ja not_active Expired - Lifetime
-
1990
- 1990-08-27 US US07/572,638 patent/US5294292A/en not_active Expired - Lifetime
- 1990-08-30 KR KR1019900013452A patent/KR930003876B1/ko not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
JPH0744176B2 (ja) | 1995-05-15 |
JPH0385727A (ja) | 1991-04-10 |
KR930003876B1 (ko) | 1993-05-14 |
US5294292A (en) | 1994-03-15 |
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