KR900000203B1 - 적층홈이 없는 단일 결정성 반도체장치 제조방법 - Google Patents

적층홈이 없는 단일 결정성 반도체장치 제조방법 Download PDF

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Publication number
KR900000203B1
KR900000203B1 KR1019850002066A KR850002066A KR900000203B1 KR 900000203 B1 KR900000203 B1 KR 900000203B1 KR 1019850002066 A KR1019850002066 A KR 1019850002066A KR 850002066 A KR850002066 A KR 850002066A KR 900000203 B1 KR900000203 B1 KR 900000203B1
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South Korea
Prior art keywords
layer
silicon
crystalline
manufacturing
amorphous
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Expired
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KR1019850002066A
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English (en)
Korean (ko)
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KR850006646A (ko
Inventor
히데끼 야마와끼
요시히로 아리모또
시게오 고다마
다까후미 기무라
마사루 이하라
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후지쓰가부시끼가이샤
야마모도 다꾸마
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Publication of KR850006646A publication Critical patent/KR850006646A/ko
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Publication of KR900000203B1 publication Critical patent/KR900000203B1/ko
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H10D86/03—Manufacture or treatment wherein the substrate comprises sapphire, e.g. silicon-on-sapphire [SOS]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/90—Thermal treatments, e.g. annealing or sintering
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/24—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using chemical vapour deposition [CVD]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
    • H10P14/2901—Materials
    • H10P14/2902—Materials being Group IVA materials
    • H10P14/2905—Silicon, silicon germanium or germanium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
    • H10P14/3202—Materials thereof
    • H10P14/3204—Materials thereof being Group IVA semiconducting materials
    • H10P14/3211—Silicon, silicon germanium or germanium
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
    • H10P14/3202—Materials thereof
    • H10P14/3238—Materials thereof being insulating materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • H10P14/34—Deposited materials, e.g. layers
    • H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3404—Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
    • H10P14/3411—Silicon, silicon germanium or germanium
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/017—Clean surfaces
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/025—Deposition multi-step
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/15—Silicon on sapphire SOS

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  • Recrystallisation Techniques (AREA)
KR1019850002066A 1984-03-28 1985-03-28 적층홈이 없는 단일 결정성 반도체장치 제조방법 Expired KR900000203B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP59060403A JPS60202952A (ja) 1984-03-28 1984-03-28 半導体装置の製造方法
JP59-60403 1984-03-28

Publications (2)

Publication Number Publication Date
KR850006646A KR850006646A (ko) 1985-10-14
KR900000203B1 true KR900000203B1 (ko) 1990-01-23

Family

ID=13141166

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019850002066A Expired KR900000203B1 (ko) 1984-03-28 1985-03-28 적층홈이 없는 단일 결정성 반도체장치 제조방법

Country Status (5)

Country Link
US (1) US5037774A (https=)
EP (1) EP0159252B1 (https=)
JP (1) JPS60202952A (https=)
KR (1) KR900000203B1 (https=)
DE (1) DE3587377T2 (https=)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4752590A (en) * 1986-08-20 1988-06-21 Bell Telephone Laboratories, Incorporated Method of producing SOI devices
JPH01244608A (ja) * 1988-03-26 1989-09-29 Fujitsu Ltd 半導体結晶の成長方法
JPH01289108A (ja) * 1988-05-17 1989-11-21 Fujitsu Ltd ヘテロエピタキシャル成長方法
US5310696A (en) * 1989-06-16 1994-05-10 Massachusetts Institute Of Technology Chemical method for the modification of a substrate surface to accomplish heteroepitaxial crystal growth
US5444302A (en) 1992-12-25 1995-08-22 Hitachi, Ltd. Semiconductor device including multi-layer conductive thin film of polycrystalline material
JP3497198B2 (ja) * 1993-02-03 2004-02-16 株式会社半導体エネルギー研究所 半導体装置および薄膜トランジスタの作製方法
US5843225A (en) * 1993-02-03 1998-12-01 Semiconductor Energy Laboratory Co., Ltd. Process for fabricating semiconductor and process for fabricating semiconductor device
US6997985B1 (en) 1993-02-15 2006-02-14 Semiconductor Energy Laboratory Co., Ltd. Semiconductor, semiconductor device, and method for fabricating the same
EP1119053B1 (en) * 1993-02-15 2011-11-02 Semiconductor Energy Laboratory Co., Ltd. Method for fabricating TFT semiconductor device
JPH0794420A (ja) * 1993-09-20 1995-04-07 Fujitsu Ltd 化合物半導体結晶基板の製造方法
US5402749A (en) * 1994-05-03 1995-04-04 The United States Of America As Represented By The Secretary Of The Navy Ultra-high vacuum/chemical vapor deposition of epitaxial silicon-on-sapphire
US5915174A (en) * 1994-09-30 1999-06-22 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for producing the same
US5893948A (en) * 1996-04-05 1999-04-13 Xerox Corporation Method for forming single silicon crystals using nucleation sites
US5733641A (en) * 1996-05-31 1998-03-31 Xerox Corporation Buffered substrate for semiconductor devices
US6501094B1 (en) * 1997-06-11 2002-12-31 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device comprising a bottom gate type thin film transistor
US6037199A (en) * 1999-08-16 2000-03-14 Taiwan Semiconductor Manufacturing Company, Ltd. SOI device for DRAM cells beyond gigabit generation and method for making the same
DE10025871A1 (de) * 2000-05-25 2001-12-06 Wacker Siltronic Halbleitermat Epitaxierte Halbleiterscheibe und Verfahren zu ihrer Herstellung
US6933566B2 (en) * 2001-07-05 2005-08-23 International Business Machines Corporation Method of forming lattice-matched structure on silicon and structure formed thereby
US6852575B2 (en) * 2001-07-05 2005-02-08 International Business Machines Corporation Method of forming lattice-matched structure on silicon and structure formed thereby
US6787433B2 (en) * 2001-09-19 2004-09-07 Kabushiki Kaisha Toshiba Semiconductor device and method of manufacturing the same
US7452757B2 (en) * 2002-05-07 2008-11-18 Asm America, Inc. Silicon-on-insulator structures and methods
JP2004165351A (ja) * 2002-11-12 2004-06-10 Fujitsu Ltd 半導体装置の製造方法
DE102005009725A1 (de) * 2005-03-03 2006-09-07 Atmel Germany Gmbh Verfahren zur Integration von zwei Bipolartransistoren in einen Halbleiterkörper, Halbleiteranordnung in einem Halbleiterkörper und Kaskodenschaltung
RU2292607C1 (ru) * 2005-04-18 2007-01-27 Кабардино-Балкарский государственный университет им. Х.М. Бербекова Способ изготовления полупроводниковой структуры
EP2206808B1 (en) * 2008-12-23 2017-07-12 Imec Method for manufacturing a mono-crystalline semiconductor layer on a substrate
US8592294B2 (en) * 2010-02-22 2013-11-26 Asm International N.V. High temperature atomic layer deposition of dielectric oxides
US10002780B2 (en) * 2016-05-17 2018-06-19 Taiwan Semiconductor Manufacturing Company Ltd. Method of manufacturing a semiconductor structure

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1597033A (https=) * 1968-06-19 1970-06-22
US3862859A (en) * 1972-01-10 1975-01-28 Rca Corp Method of making a semiconductor device
US4177321A (en) * 1972-07-25 1979-12-04 Semiconductor Research Foundation Single crystal of semiconductive material on crystal of insulating material
US4046618A (en) * 1972-12-29 1977-09-06 International Business Machines Corporation Method for preparing large single crystal thin films
US4147584A (en) * 1977-12-27 1979-04-03 Burroughs Corporation Method for providing low cost wafers for use as substrates for integrated circuits
JPS5541709A (en) * 1978-09-16 1980-03-24 Chiyou Lsi Gijutsu Kenkyu Kumiai Sos semiconductor base
US4381201A (en) * 1980-03-11 1983-04-26 Fujitsu Limited Method for production of semiconductor devices
US4279688A (en) * 1980-03-17 1981-07-21 Rca Corporation Method of improving silicon crystal perfection in silicon on sapphire devices
US4358326A (en) * 1980-11-03 1982-11-09 International Business Machines Corporation Epitaxially extended polycrystalline structures utilizing a predeposit of amorphous silicon with subsequent annealing
US4448632A (en) * 1981-05-25 1984-05-15 Mitsubishi Denki Kabushiki Kaisha Method of fabricating semiconductor devices

Also Published As

Publication number Publication date
JPH0542824B2 (https=) 1993-06-29
US5037774A (en) 1991-08-06
KR850006646A (ko) 1985-10-14
EP0159252A2 (en) 1985-10-23
EP0159252A3 (en) 1988-09-28
DE3587377T2 (de) 1993-09-23
EP0159252B1 (en) 1993-06-02
JPS60202952A (ja) 1985-10-14
DE3587377D1 (de) 1993-07-08

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