KR890015364A - 전도도 변조형 mosfet의 제조방법 - Google Patents
전도도 변조형 mosfet의 제조방법Info
- Publication number
- KR890015364A KR890015364A KR1019890002652A KR890002652A KR890015364A KR 890015364 A KR890015364 A KR 890015364A KR 1019890002652 A KR1019890002652 A KR 1019890002652A KR 890002652 A KR890002652 A KR 890002652A KR 890015364 A KR890015364 A KR 890015364A
- Authority
- KR
- South Korea
- Prior art keywords
- mosfet
- manufacturing
- conductivity modulating
- modulating
- manufacturing conductivity
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 238000000034 method Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/16—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising cuprous oxide or cuprous iodide
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66234—Bipolar junction transistors [BJT]
- H01L29/66325—Bipolar junction transistors [BJT] controlled by field-effect, e.g. insulated gate bipolar transistors [IGBT]
- H01L29/66333—Vertical insulated gate bipolar transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
- H01L29/7395—Vertical transistors, e.g. vertical IGBT
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/126—Power FETs
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Bipolar Transistors (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP88-50515 | 1988-03-03 | ||
JP63050515A JPH0734474B2 (ja) | 1988-03-03 | 1988-03-03 | 伝導度変調型mosfetの製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR890015364A true KR890015364A (ko) | 1989-10-30 |
KR930000606B1 KR930000606B1 (ko) | 1993-01-25 |
Family
ID=12861110
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019890002652A KR930000606B1 (ko) | 1988-03-03 | 1989-03-03 | 전도도 변조형 mosfet의 제조방법 |
Country Status (3)
Country | Link |
---|---|
US (1) | US5034336A (ko) |
JP (1) | JPH0734474B2 (ko) |
KR (1) | KR930000606B1 (ko) |
Families Citing this family (24)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5173435A (en) * | 1987-11-11 | 1992-12-22 | Mitsubishi Denki Kabushiki Kaisha | Insulated gate bipolar transistor |
US5182626A (en) * | 1989-09-20 | 1993-01-26 | Mitsubishi Denki Kabushiki Kaisha | Insulated gate bipolar transistor and method of manufacturing the same |
KR910010748A (ko) * | 1989-11-30 | 1991-06-29 | 정몽헌 | 적층형 캐패시터 및 제조방법 |
US5068707A (en) * | 1990-05-02 | 1991-11-26 | Nec Electronics Inc. | DRAM memory cell with tapered capacitor electrodes |
DE69029942T2 (de) * | 1990-10-16 | 1997-08-28 | Cons Ric Microelettronica | Verfahren zur Herstellung von MOS-Leistungstransistoren mit vertikalem Strom |
US5182222A (en) * | 1991-06-26 | 1993-01-26 | Texas Instruments Incorporated | Process for manufacturing a DMOS transistor |
JP2689047B2 (ja) * | 1991-07-24 | 1997-12-10 | 三菱電機株式会社 | 絶縁ゲート型バイポーラトランジスタとその製造方法 |
US5268586A (en) * | 1992-02-25 | 1993-12-07 | North American Philips Corporation | Vertical power MOS device with increased ruggedness and method of fabrication |
US5321281A (en) * | 1992-03-18 | 1994-06-14 | Mitsubishi Denki Kabushiki Kaisha | Insulated gate semiconductor device and method of fabricating same |
JPH06244429A (ja) * | 1992-12-24 | 1994-09-02 | Mitsubishi Electric Corp | 絶縁ゲート型半導体装置及びその製造方法 |
JP3294001B2 (ja) * | 1994-06-01 | 2002-06-17 | 三菱電機株式会社 | 絶縁ゲート型半導体装置の製造方法 |
US5795793A (en) * | 1994-09-01 | 1998-08-18 | International Rectifier Corporation | Process for manufacture of MOS gated device with reduced mask count |
JP3399119B2 (ja) | 1994-11-10 | 2003-04-21 | 富士電機株式会社 | 半導体装置およびその製造方法 |
JP3384198B2 (ja) * | 1995-07-21 | 2003-03-10 | 三菱電機株式会社 | 絶縁ゲート型半導体装置およびその製造方法 |
KR0175276B1 (ko) * | 1996-01-26 | 1999-02-01 | 김광호 | 전력반도체장치 및 그의 제조방법 |
KR100256109B1 (ko) * | 1997-05-07 | 2000-05-01 | 김덕중 | 전력 반도체 장치 |
US6121089A (en) * | 1997-10-17 | 2000-09-19 | Intersil Corporation | Methods of forming power semiconductor devices having merged split-well body regions therein |
DE19840402C2 (de) * | 1997-12-12 | 2003-07-31 | Nat Semiconductor Corp | Verfahren zum Herstellen einer Struktur eines DMOS-Leistungselementes und Struktur eines DMOS-Leistungselementes |
US6197640B1 (en) * | 1998-12-21 | 2001-03-06 | Semiconductor Components Industries, Llc | Semiconductor component and method of manufacture |
JP2001024184A (ja) * | 1999-07-05 | 2001-01-26 | Fuji Electric Co Ltd | 絶縁ゲートトランジスタおよびその製造方法 |
JP2005057028A (ja) * | 2003-08-04 | 2005-03-03 | Sanken Electric Co Ltd | 絶縁ゲート型バイポーラトランジスタ |
US20090309131A1 (en) | 2006-05-11 | 2009-12-17 | Stmicroelectronics S.R.L. | Igbt transistor with protection against parasitic component activation and manufacturing process thereof |
JP5195816B2 (ja) * | 2010-05-17 | 2013-05-15 | 富士電機株式会社 | 半導体装置の製造方法 |
US10218349B2 (en) * | 2016-05-17 | 2019-02-26 | Littelfuse, Inc. | IGBT having improved clamp arrangement |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4680853A (en) * | 1980-08-18 | 1987-07-21 | International Rectifier Corporation | Process for manufacture of high power MOSFET with laterally distributed high carrier density beneath the gate oxide |
US4430792A (en) * | 1982-07-08 | 1984-02-14 | General Electric Company | Minimal mask process for manufacturing insulated-gate semiconductor devices with integral shorts |
US4417385A (en) * | 1982-08-09 | 1983-11-29 | General Electric Company | Processes for manufacturing insulated-gate semiconductor devices with integral shorts |
US4466176A (en) * | 1982-08-09 | 1984-08-21 | General Electric Company | Process for manufacturing insulated-gate semiconductor devices with integral shorts |
JPS628568A (ja) * | 1985-07-04 | 1987-01-16 | Tdk Corp | 縦形半導体装置及びその製造方法 |
DE3688057T2 (de) * | 1986-01-10 | 1993-10-07 | Gen Electric | Halbleitervorrichtung und Methode zur Herstellung. |
IT1204243B (it) * | 1986-03-06 | 1989-03-01 | Sgs Microelettronica Spa | Procedimento autoallineato per la fabbricazione di celle dmos di piccole dimensioni e dispositivi mos ottenuti mediante detto procedimento |
-
1988
- 1988-03-03 JP JP63050515A patent/JPH0734474B2/ja not_active Expired - Lifetime
-
1989
- 1989-03-03 KR KR1019890002652A patent/KR930000606B1/ko not_active IP Right Cessation
-
1990
- 1990-10-10 US US07/596,562 patent/US5034336A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
US5034336A (en) | 1991-07-23 |
KR930000606B1 (ko) | 1993-01-25 |
JPH01225166A (ja) | 1989-09-08 |
JPH0734474B2 (ja) | 1995-04-12 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
G160 | Decision to publish patent application | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20010119 Year of fee payment: 9 |
|
LAPS | Lapse due to unpaid annual fee |