KR880001046A - 반도체 콤포넌트 내부의 전기 연결방법 - Google Patents

반도체 콤포넌트 내부의 전기 연결방법 Download PDF

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KR880001046A
KR880001046A KR1019870006604A KR870006604A KR880001046A KR 880001046 A KR880001046 A KR 880001046A KR 1019870006604 A KR1019870006604 A KR 1019870006604A KR 870006604 A KR870006604 A KR 870006604A KR 880001046 A KR880001046 A KR 880001046A
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South Korea
Prior art keywords
contact surface
welded
electrical connection
substrate
semiconductor
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KR1019870006604A
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English (en)
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사이플러 디터
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디터 비트마이어, 클라우스 포스
로베르트 보쉬 게엠베하
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Publication of KR880001046A publication Critical patent/KR880001046A/ko

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  • Engineering & Computer Science (AREA)
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Abstract

내용 없음

Description

반도체 콤포넌트 내부의 전기 연결방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
재1도는 기판에 위치한 접촉면과 반도체 칩의 접촉 기판 사이의 종래의 와이어 연결을 도시한 도면. 제2도는 반도체 콤포넌트 내부에 본 발명에 따른 와이어 연결을 도시한 도면.

Claims (3)

  1. 기판위에 배치되는 적어도 하나의 반도체 칩을 구체화하는 반도체 콤포넌트 내부에, 초음파를 사용하여 접촉면에 용접되는 매우 얇은 와이어로 전기 연결을 행하는 방법에 있어서, 와이어(10)는 각 경우에 제일 먼저 기판(4)에 위치한 접촉면(3)에 용접된 다음 반도체 칩(2)에 위치한 접촉면(7)에 용접되는 것을 특징으로 하는 반도체 내부의 전기 연결 방법.
  2. 제1항에 있어서, 와이어(10)는 서로로부터 어떤 거리를 두고 배치된 두개의 위치(5,6)에서 기판위에 위치한 접촉면(3)에 용접된 다음, 반도체 칩(2)의 접촉면(7)에 용접되는 것을 특징으로 하는 반도체 내부의 전기 연결방법.
  3. 매우 얇은 와이어들이 접촉면에 용접되며, 기판위에 배치된 반도체 칩과 접촉면 사이의 반도체 콘포넌트에 대한 전기 연결에서, 와이어(10)는 각 경우에 기판(4)의 접촉면(30)위의 두 개의 용접 포인트(5,6)에 용접되고, 반도체 칩(2)의 접촉면(7)에서 용접 포인트에 용접되는 것을 특징으로 하는 반도체 콤포넌트에 대한 전기 연결.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019870006604A 1986-06-30 1987-06-29 반도체 콤포넌트 내부의 전기 연결방법 KR880001046A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19863621917 DE3621917A1 (de) 1986-06-30 1986-06-30 Verfahren zur herstellung elektrischer verbindungen innerhalb von halbleiterbauelementen und elektrische verbindung fuer halbleiterbauelemente
DE3621917.7 1986-06-30

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KR880001046A true KR880001046A (ko) 1988-03-31

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KR1019870006604A KR880001046A (ko) 1986-06-30 1987-06-29 반도체 콤포넌트 내부의 전기 연결방법

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JP (1) JPS6310535A (ko)
KR (1) KR880001046A (ko)
DE (1) DE3621917A1 (ko)

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* Cited by examiner, † Cited by third party
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US5214844A (en) * 1990-12-17 1993-06-01 Nchip, Inc. Method of assembling integrated circuits to a silicon board
US5874354A (en) * 1995-09-26 1999-02-23 Siemens Aktiengesellschaft Method for electrically connecting a semiconductor chip to at least one contact surface and smart card module and smart card produced by the method
JP4629284B2 (ja) * 2001-09-10 2011-02-09 ローム株式会社 半導体装置およびその製造方法
US8016182B2 (en) 2005-05-10 2011-09-13 Kaijo Corporation Wire loop, semiconductor device having same and wire bonding method
SG143060A1 (en) * 2005-05-10 2008-06-27 Kaijo Kk Wire loop, semiconductor device having same and wire bonding method
CN103311142B (zh) * 2013-06-21 2016-08-17 深圳市振华微电子有限公司 封装结构及其封装工艺
CN105355617A (zh) * 2015-11-25 2016-02-24 江苏欧密格光电科技股份有限公司 一种裸芯片技术中增强焊线牢靠度的结构及其方法

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JPS59195856A (ja) * 1983-04-20 1984-11-07 Fujitsu Ltd 半導体装置及びその製造方法
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