KR870011704A - 래터럴 트랜지스터 - Google Patents
래터럴 트랜지스터 Download PDFInfo
- Publication number
- KR870011704A KR870011704A KR870005539A KR870005539A KR870011704A KR 870011704 A KR870011704 A KR 870011704A KR 870005539 A KR870005539 A KR 870005539A KR 870005539 A KR870005539 A KR 870005539A KR 870011704 A KR870011704 A KR 870011704A
- Authority
- KR
- South Korea
- Prior art keywords
- region
- lateral transistor
- semiconductor
- active base
- lateral
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 claims 14
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims 2
- 239000002800 charge carrier Substances 0.000 claims 2
- 230000005669 field effect Effects 0.000 claims 2
- 238000005468 ion implantation Methods 0.000 claims 2
- 230000002093 peripheral effect Effects 0.000 claims 2
- 229910052581 Si3N4 Inorganic materials 0.000 claims 1
- 239000012535 impurity Substances 0.000 claims 1
- 238000002347 injection Methods 0.000 claims 1
- 239000007924 injection Substances 0.000 claims 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 claims 1
- 235000012239 silicon dioxide Nutrition 0.000 claims 1
- 239000000377 silicon dioxide Substances 0.000 claims 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims 1
- 239000000758 substrate Substances 0.000 claims 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/92—Capacitors having potential barriers
- H01L29/94—Metal-insulator-semiconductors, e.g. MOS
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
- H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
- H01L21/2652—Through-implantation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/74—Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8248—Combination of bipolar and field-effect technology
- H01L21/8249—Bipolar and MOS technology
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/1004—Base region of bipolar transistors
- H01L29/1008—Base region of bipolar transistors of lateral transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/402—Field plates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/73—Bipolar junction transistors
- H01L29/735—Lateral transistors
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/009—Bi-MOS
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/01—Bipolar transistors-ion implantation
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- High Energy & Nuclear Physics (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Bipolar Transistors (AREA)
- Bipolar Integrated Circuits (AREA)
Abstract
내용 없음
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 제2도의 선 A-A'를 따라 취한 본 발명의 래터럴 트랜지스터의단면도.
제2도는 제1도의 평면도.
제3도는 제1도에서 본 발명의 기본구성으로 되는 부분 단면도
Claims (11)
- 에미터와 콜렉터를 구성하고 1차전도형의 반도체지역(12)의 표면으로 결합되어 있는 2차전도형의 2개영역(19c,19d)으로 이루어지며, 상기 2개영역 사이에 위치한 1차전도형의 반도체 지역부분이 활성베이스영역(26)을 구성하는 래터럴 트랜지스터에 있어서, 상기 에미터영역(19d)과 콜랙터영역(19c) 사이의 반도체 표면과 떨어져서 상기 활성 베이스영역(26)내로 소수전하캐리어를 집중시키는 수단이 제공되어 있는 것을 특징으로 하는 래터럴 트랜지스터.
- 제1항에 있어서, 상기 활성베이스영역(26)은 반도체 표면아래와 에미터영역(19d) 및 콜렉터영역(19c)에 인접하여 활성베이스영역의 나머지 주변지역에 비해 반대성질로 도우프된 불순물을 포함하는 매입된 반도체영역(25)을 갖는 것을 특징으로 하는 래터럴 트랜지스터.
- 제2항에 있어서, 상기 매입된 반도체영역(25)은 1차전도형으로 되고, 상기 베이스영역(26)의 나머지 주변지역에 비해 도우핑이 실질적으로 감소되어 있는 것을 특징으로 하는 래터럴 트랜지스터.
- 제2항에 있어서, 상기 매입된 반도체영역(25)은 2차전도형으로 되고, 통상 ON상태(공핍 모우드)가 되지않도록 약간만 도우프되는 것을 특징으로 하는 래터럴 트랜지스터.
- 제2항에 있어서, 상기 래터럴 트랜지스터가 PNP형 래터럴 트랜지스터인 것을 특징으로 하는 래터럴 프랜지스터.
- 제2항에 있어서, 상기 매입된 반도체영역(25)은 이온 주입에 의해 제작되는 것을 특징으로하는 래터럴 트랜지스터.
- 제2항에 있어서, 상기 매입된 반도체영역(25)은 반도체 표면으로부터 약 0.3㎛ 떨어져있고, 약0.6㎛의 깊이로 침투되며, n-형 p-형 도전성을 갖도록 각각 10141016cm3농도의 도우핑이 시행되게 한 것을 특징으로 하는 래터럴 트랜지스터.
- 제1항에 있어서, 상기 활성 베이스영역(26)은 반도체 표면에서 에미터 접촉부(23k)와 연결된 전극층(15d)이 설치되어있는 절연층(24)으로 씌워져 있는 것을 특징으로 하는 래터럴 트랜지스터.
- 제8항에 있어서, 상기 전극층(15d)은 도전성 단결정실리콘으로 구성되며 그 아래에 배치된 절연층(24) 은 이산화실리콘 또는 질화실리콘으로 구성되는 것을 특징으로 하는 래터럴 트랜지스터.
- 제1항에 있어서, 모든 구성요소와 공통연결되는 반도체기판(1)위에 CMOS전계효과 트랜지스터 및 NPN 바이폴라트랜지스터가 함께 배치되어 있는 것을 특징으로 하는 래터럴 트랜지스터.
- 제2항에 있어서, 상기 매입된 반도체영역(25)이 이온주입에 의해 래터럴 트랜지스터의 활성베이스영역(26)내에 형성되고 이때 CMOS전계효과 트랜지스터의 임계전압이 반도체 표면을 덮는 게이트 절연층(24)을 통한 전하 캐리어의 주입에 의해 설정되게 한 것을 특징으로 하는 래터럴 트랜지스터.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE3618166.8 | 1986-05-30 | ||
DE19863618166 DE3618166A1 (de) | 1986-05-30 | 1986-05-30 | Lateraltransistor |
Publications (2)
Publication Number | Publication Date |
---|---|
KR870011704A true KR870011704A (ko) | 1987-12-26 |
KR950006479B1 KR950006479B1 (ko) | 1995-06-15 |
Family
ID=6301915
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019870005539A KR950006479B1 (ko) | 1986-05-30 | 1987-05-30 | 래터럴 트랜지스터 |
Country Status (5)
Country | Link |
---|---|
US (2) | US4829356A (ko) |
EP (1) | EP0247386B1 (ko) |
JP (1) | JP2619872B2 (ko) |
KR (1) | KR950006479B1 (ko) |
DE (2) | DE3618166A1 (ko) |
Families Citing this family (31)
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US5156990A (en) * | 1986-07-23 | 1992-10-20 | Texas Instruments Incorporated | Floating-gate memory cell with tailored doping profile |
US5258644A (en) * | 1988-02-24 | 1993-11-02 | Hitachi, Ltd. | Semiconductor device and method of manufacture thereof |
EP0396948B1 (en) * | 1989-04-21 | 1997-12-29 | Nec Corporation | Bi-cmos integrated circuit |
JP2950577B2 (ja) * | 1990-04-27 | 1999-09-20 | 沖電気工業株式会社 | BiCMOS半導体集積回路の製造方法 |
US5281544A (en) * | 1990-07-23 | 1994-01-25 | Seiko Epson Corporation | Method of manufacturing planar type polar transistors and combination bipolar/MIS type transistors |
JP2842682B2 (ja) * | 1990-11-08 | 1999-01-06 | シャープ株式会社 | 半導体装置の製造方法 |
US5629547A (en) * | 1991-04-23 | 1997-05-13 | Intel Corporation | BICMOS process for counter doped collector |
GB2255226B (en) * | 1991-04-23 | 1995-03-01 | Intel Corp | Bicmos process for counter doped collector |
KR940007466B1 (ko) * | 1991-11-14 | 1994-08-18 | 삼성전자 주식회사 | BiCMOS 소자의 제조방법 |
US5198376A (en) * | 1992-07-07 | 1993-03-30 | International Business Machines Corporation | Method of forming high performance lateral PNP transistor with buried base contact |
DE69326340T2 (de) * | 1993-09-27 | 2000-01-13 | Stmicroelectronics S.R.L., Agrate Brianza | Geräuscharmer pnp-Transistor |
US5422502A (en) * | 1993-12-09 | 1995-06-06 | Northern Telecom Limited | Lateral bipolar transistor |
US5360750A (en) * | 1994-01-13 | 1994-11-01 | United Microelectronics Corp. | Method of fabricating lateral bipolar transistors |
DE9419617U1 (de) * | 1994-12-07 | 1996-04-04 | Ic - Haus Gmbh, 55294 Bodenheim | MOS-Leistungstransistor |
US5917219A (en) * | 1995-10-09 | 1999-06-29 | Texas Instruments Incorporated | Semiconductor devices with pocket implant and counter doping |
US5945726A (en) * | 1996-12-16 | 1999-08-31 | Micron Technology, Inc. | Lateral bipolar transistor |
DE19743265A1 (de) * | 1997-09-30 | 1999-04-08 | Siemens Ag | Halbleiter-Leistungsbauelement mit erhöhter Latch-up-Festigkeit |
US6140170A (en) * | 1999-08-27 | 2000-10-31 | Lucent Technologies Inc. | Manufacture of complementary MOS and bipolar integrated circuits |
US6117718A (en) * | 1999-08-31 | 2000-09-12 | United Microelectronics Corp. | Method for forming BJT via formulation of high voltage device in ULSI |
US6551869B1 (en) * | 2000-06-09 | 2003-04-22 | Motorola, Inc. | Lateral PNP and method of manufacture |
US7217977B2 (en) * | 2004-04-19 | 2007-05-15 | Hrl Laboratories, Llc | Covert transformation of transistor properties as a circuit protection method |
US6815816B1 (en) * | 2000-10-25 | 2004-11-09 | Hrl Laboratories, Llc | Implanted hidden interconnections in a semiconductor device for preventing reverse engineering |
US7049667B2 (en) | 2002-09-27 | 2006-05-23 | Hrl Laboratories, Llc | Conductive channel pseudo block process and circuit to inhibit reverse engineering |
US6979606B2 (en) | 2002-11-22 | 2005-12-27 | Hrl Laboratories, Llc | Use of silicon block process step to camouflage a false transistor |
AU2003293540A1 (en) | 2002-12-13 | 2004-07-09 | Raytheon Company | Integrated circuit modification using well implants |
US7242063B1 (en) | 2004-06-29 | 2007-07-10 | Hrl Laboratories, Llc | Symmetric non-intrusive and covert technique to render a transistor permanently non-operable |
US8168487B2 (en) | 2006-09-28 | 2012-05-01 | Hrl Laboratories, Llc | Programmable connection and isolation of active regions in an integrated circuit using ambiguous features to confuse a reverse engineer |
US8035196B2 (en) * | 2008-04-02 | 2011-10-11 | Zarlink Semiconductor (Us) Inc. | Methods of counter-doping collector regions in bipolar transistors |
US9070709B2 (en) | 2011-06-09 | 2015-06-30 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | Method for producing a field effect transistor with implantation through the spacers |
US9502504B2 (en) * | 2013-12-19 | 2016-11-22 | International Business Machines Corporation | SOI lateral bipolar transistors having surrounding extrinsic base portions |
CN212062440U (zh) * | 2020-06-24 | 2020-12-01 | 广东致能科技有限公司 | 一种常关型器件 |
Family Cites Families (22)
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CH441512A (fr) * | 1966-08-02 | 1967-08-15 | Centre Electron Horloger | Transistor latéral et procédé pour sa fabrication |
US3873989A (en) * | 1973-05-07 | 1975-03-25 | Fairchild Camera Instr Co | Double-diffused, lateral transistor structure |
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DE2507613C3 (de) * | 1975-02-21 | 1979-07-05 | Siemens Ag, 1000 Berlin Und 8000 Muenchen | Verfahren zur Herstellung eines invers betriebenen Transistors |
DE2529951A1 (de) * | 1975-07-04 | 1977-01-27 | Siemens Ag | Lateraler, bipolarer transistor |
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DE2835330C3 (de) * | 1978-08-11 | 1982-03-11 | Siemens AG, 1000 Berlin und 8000 München | Integrierter bipolarer Halbleiterschaltkreis sowie Verfahren zu seiner Herstellung |
JPS55110071A (en) * | 1979-02-16 | 1980-08-25 | Seiko Instr & Electronics Ltd | Semiconductor device |
JPS55156366A (en) * | 1979-05-24 | 1980-12-05 | Toshiba Corp | Semiconductor device |
JPS567463A (en) * | 1979-06-29 | 1981-01-26 | Hitachi Ltd | Semiconductor device and its manufacture |
US4283236A (en) * | 1979-09-19 | 1981-08-11 | Harris Corporation | Method of fabricating lateral PNP transistors utilizing selective diffusion and counter doping |
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JPS6174369A (ja) * | 1984-09-20 | 1986-04-16 | Sony Corp | 半導体装置 |
US4649629A (en) * | 1985-07-29 | 1987-03-17 | Thomson Components - Mostek Corp. | Method of late programming a read only memory |
US4669177A (en) * | 1985-10-28 | 1987-06-02 | Texas Instruments Incorporated | Process for making a lateral bipolar transistor in a standard CSAG process |
-
1986
- 1986-05-30 DE DE19863618166 patent/DE3618166A1/de active Granted
-
1987
- 1987-05-02 DE DE8787106346T patent/DE3768854D1/de not_active Expired - Lifetime
- 1987-05-02 EP EP87106346A patent/EP0247386B1/de not_active Expired - Lifetime
- 1987-05-06 US US07/046,534 patent/US4829356A/en not_active Expired - Lifetime
- 1987-05-29 JP JP62131977A patent/JP2619872B2/ja not_active Expired - Fee Related
- 1987-05-30 KR KR1019870005539A patent/KR950006479B1/ko not_active IP Right Cessation
-
1989
- 1989-04-14 US US07/337,945 patent/US4956305A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JP2619872B2 (ja) | 1997-06-11 |
EP0247386A3 (en) | 1988-03-16 |
DE3618166C2 (ko) | 1989-10-26 |
US4956305A (en) | 1990-09-11 |
EP0247386B1 (de) | 1991-03-27 |
DE3618166A1 (de) | 1987-12-03 |
KR950006479B1 (ko) | 1995-06-15 |
DE3768854D1 (de) | 1991-05-02 |
US4829356A (en) | 1989-05-09 |
JPS62291171A (ja) | 1987-12-17 |
EP0247386A2 (de) | 1987-12-02 |
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