KR870011672A - 단결정 실리콘의 디프 트렌치 에칭 - Google Patents
단결정 실리콘의 디프 트렌치 에칭 Download PDFInfo
- Publication number
- KR870011672A KR870011672A KR870004854A KR870004854A KR870011672A KR 870011672 A KR870011672 A KR 870011672A KR 870004854 A KR870004854 A KR 870004854A KR 870004854 A KR870004854 A KR 870004854A KR 870011672 A KR870011672 A KR 870011672A
- Authority
- KR
- South Korea
- Prior art keywords
- etching
- plasma
- mask
- atmosphere
- deep trench
- Prior art date
Links
- 238000005530 etching Methods 0.000 title claims description 8
- 229910021421 monocrystalline silicon Inorganic materials 0.000 title claims 4
- 239000000758 substrate Substances 0.000 claims description 7
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 4
- 238000001020 plasma etching Methods 0.000 claims description 4
- 229910052710 silicon Inorganic materials 0.000 claims description 4
- 239000010703 silicon Substances 0.000 claims description 4
- 238000000034 method Methods 0.000 claims 10
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 claims 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims 2
- 150000002500 ions Chemical class 0.000 claims 2
- 229910052581 Si3N4 Inorganic materials 0.000 claims 1
- 229910004298 SiO 2 Inorganic materials 0.000 claims 1
- 229910052786 argon Inorganic materials 0.000 claims 1
- 229910052799 carbon Inorganic materials 0.000 claims 1
- 125000004432 carbon atom Chemical group C* 0.000 claims 1
- 150000001875 compounds Chemical class 0.000 claims 1
- 238000010790 dilution Methods 0.000 claims 1
- 239000012895 dilution Substances 0.000 claims 1
- 239000007789 gas Substances 0.000 claims 1
- 239000001307 helium Substances 0.000 claims 1
- 229910052734 helium Inorganic materials 0.000 claims 1
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 claims 1
- 229910052743 krypton Inorganic materials 0.000 claims 1
- DNNSSWSSYDEUBZ-UHFFFAOYSA-N krypton atom Chemical compound [Kr] DNNSSWSSYDEUBZ-UHFFFAOYSA-N 0.000 claims 1
- QKCGXXHCELUCKW-UHFFFAOYSA-N n-[4-[4-(dinaphthalen-2-ylamino)phenyl]phenyl]-n-naphthalen-2-ylnaphthalen-2-amine Chemical compound C1=CC=CC2=CC(N(C=3C=CC(=CC=3)C=3C=CC(=CC=3)N(C=3C=C4C=CC=CC4=CC=3)C=3C=C4C=CC=CC4=CC=3)C3=CC4=CC=CC=C4C=C3)=CC=C21 QKCGXXHCELUCKW-UHFFFAOYSA-N 0.000 claims 1
- 229910052754 neon Inorganic materials 0.000 claims 1
- GKAOGPIIYCISHV-UHFFFAOYSA-N neon atom Chemical compound [Ne] GKAOGPIIYCISHV-UHFFFAOYSA-N 0.000 claims 1
- 235000012239 silicon dioxide Nutrition 0.000 claims 1
- 239000000377 silicon dioxide Substances 0.000 claims 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000873 masking effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/06—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials
- H01L21/14—Treatment of the complete device, e.g. by electroforming to form a barrier
- H01L21/145—Ageing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/3065—Plasma etching; Reactive-ion etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
- H01L21/3081—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their composition, e.g. multilayer masks, materials
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- Plasma & Fusion (AREA)
- Health & Medical Sciences (AREA)
- Gerontology & Geriatric Medicine (AREA)
- Drying Of Semiconductors (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
- ing And Chemical Polishing (AREA)
- Element Separation (AREA)
Abstract
내용 없음
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 실리콘 기판에서 디프 트렌치(deep trench)를 형성할 수 있게끔 본 발명의 플라즈마 에칭 조성물이 사용되는 에칭조운에 대한 개략도
제2도는 마스크와 언더커팅과 트렌치의 보잉(bowing)을 발행시키는 종래기술에 따른 실리콘 기판기판에서의 부식패턴에 대한 단면도
제3도는 실리콘 기판과 그 위에 놓인 구멍이 뚫린 마스크를 에칭하기 전의 상태로 도시한 도면.
Claims (8)
- 수직측면부를 갖는 디프 트렌치를 형성하기 위해 단결정 실리콘을 구멍이 뚫린 마스크를 통해 빠르고 비등방성으로 리액티브 이온 프라즈마 에칭하기 위한 공정은a) 이산화 실리콘과 실리콘 나이트라이드로 구성되는 그룹중에서 선택되는 구멍이 뚫린 마스크와 단결정 실리콘을 제공하는 단계,b) 니트로겐 트리플루오라이드(NF3)와 카본 1원자만을 함유하는 할로플루오로카본(HFC) 화합물이 1-2NF3: 1-3HFC비율인 에칭 조운내의 분위기에 상기 기판을 노출시키는 단계,c) 상기 플라즈마의 이온들을 상기 마스크의 개구를 통해 단결정 실리콘 기판내로 향하게 하므로써 플라즈마 분위기를 생성하고 상기 기판을 비등방성의 리액티브 이온 에칭하는 단계를 구비하고, 상기 에칭은 500-2000와트의 전력과 1-50MHz의 주파수를 사용해서 적어도 0.1미크론/분의 빠른 속도로 실행되어, 상기 기판에 수직 깊이가 3-15미크론이고 마스크의 언더커팅 및 트렌치의 보잉이 실질적으로 전재하지 않는 디프 트렌치를 형성하게 되는 것을 특징으로 하는 실리콘의 플라즈마 에칭공정.
- 제1항에 있어서, 상기 할로플루오카본은 CF3Cl, CF2Cl2, CF3Br, CF3I, CF2Br2, CF2I2, CF3ClH 및 CCl2FH로 구성되는 그룹중에서 선택되는 것을 특징으로 하는 공정.
- 제1항에 있어서, 상기 분위기는 NF3와 CF3Cl를 구비하는 것을 특징으로 하는 공정.
- 제1항에 있어서, 에칭하는 동안 상기 에칭 조운은 0.1보다 크고 1.0torr까지의 압력으로 유지되는 것을 특징으로 하는 공정.
- 제1항에 있어서, 구멍이 뚫린 마스크는 SiO2인 것을 특징으로 하는 공정.
- 제1항에 있어서, 상기 에칭 조운에서의 대기유동속도는 10-100SCCM인 것을 특징으로 하는 공정.
- 제1항에 있어서, 상기 에칭 조운은 15-25℃의 온도를 유지하는 이격된 전극들을 포함하는 것을 특징으로 하는 공정.
- 제1항에 있어서, 상기 분위기는 아르곤, 크립톤, 헬륨 또는 네온으로 구성되는 그룹 중에서 선택된 희석 개스를 포함하는 것을 특징으로 하는 공정.※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US86417786A | 1986-05-16 | 1986-05-16 | |
US864,177 | 1986-05-16 | ||
US864177 | 1986-05-16 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR870011672A true KR870011672A (ko) | 1987-12-26 |
KR900003804B1 KR900003804B1 (ko) | 1990-05-31 |
Family
ID=25342688
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019870004854A KR900003804B1 (ko) | 1986-05-16 | 1987-05-16 | 단결정 실리콘의 디프 트렌치 에칭 |
Country Status (5)
Country | Link |
---|---|
EP (1) | EP0246514A3 (ko) |
JP (1) | JPS6333586A (ko) |
KR (1) | KR900003804B1 (ko) |
BR (1) | BR8702442A (ko) |
ZA (1) | ZA873465B (ko) |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3752259T2 (de) * | 1986-12-19 | 1999-10-14 | Applied Materials | Bromine-Ätzverfahren für Silizium |
JP3371143B2 (ja) * | 1991-06-03 | 2003-01-27 | ソニー株式会社 | ドライエッチング方法 |
DE4317623C2 (de) * | 1993-05-27 | 2003-08-21 | Bosch Gmbh Robert | Verfahren und Vorrichtung zum anisotropen Plasmaätzen von Substraten und dessen Verwendung |
EP1357584A3 (en) * | 1996-08-01 | 2005-01-12 | Surface Technology Systems Plc | Method of surface treatment of semiconductor substrates |
GB9616225D0 (en) | 1996-08-01 | 1996-09-11 | Surface Tech Sys Ltd | Method of surface treatment of semiconductor substrates |
US6187685B1 (en) | 1997-08-01 | 2001-02-13 | Surface Technology Systems Limited | Method and apparatus for etching a substrate |
US6051346A (en) * | 1998-04-29 | 2000-04-18 | Lucent Technologies Inc. | Process for fabricating a lithographic mask |
US6417013B1 (en) | 1999-01-29 | 2002-07-09 | Plasma-Therm, Inc. | Morphed processing of semiconductor devices |
US8614151B2 (en) * | 2008-01-04 | 2013-12-24 | Micron Technology, Inc. | Method of etching a high aspect ratio contact |
JP5064319B2 (ja) * | 2008-07-04 | 2012-10-31 | 東京エレクトロン株式会社 | プラズマエッチング方法、制御プログラム及びコンピュータ記憶媒体 |
CN102324387A (zh) * | 2011-09-28 | 2012-01-18 | 上海宏力半导体制造有限公司 | 深沟槽的形成方法 |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4226665A (en) * | 1978-07-31 | 1980-10-07 | Bell Telephone Laboratories, Incorporated | Device fabrication by plasma etching |
US4475982A (en) * | 1983-12-12 | 1984-10-09 | International Business Machines Corporation | Deep trench etching process using CCl2 F2 /Ar and CCl2 F.sub. /O2 RIE |
CA1260365A (en) * | 1985-05-06 | 1989-09-26 | Lee Chen | Anisotropic silicon etching in fluorinated plasma |
-
1987
- 1987-05-08 EP EP87106711A patent/EP0246514A3/en not_active Withdrawn
- 1987-05-13 JP JP62116698A patent/JPS6333586A/ja active Granted
- 1987-05-13 BR BR8702442A patent/BR8702442A/pt unknown
- 1987-05-14 ZA ZA873465A patent/ZA873465B/xx unknown
- 1987-05-16 KR KR1019870004854A patent/KR900003804B1/ko active IP Right Grant
Also Published As
Publication number | Publication date |
---|---|
ZA873465B (en) | 1989-01-25 |
JPS6356312B2 (ko) | 1988-11-08 |
JPS6333586A (ja) | 1988-02-13 |
EP0246514A3 (en) | 1989-09-20 |
EP0246514A2 (en) | 1987-11-25 |
BR8702442A (pt) | 1988-02-23 |
KR900003804B1 (ko) | 1990-05-31 |
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A201 | Request for examination | ||
G160 | Decision to publish patent application | ||
E701 | Decision to grant or registration of patent right | ||
NORF | Unpaid initial registration fee |