KR860009475A - 플라즈마 에칭에 관한 원지 포토레지스트의 캡핑 프로세스 - Google Patents

플라즈마 에칭에 관한 원지 포토레지스트의 캡핑 프로세스 Download PDF

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KR860009475A
KR860009475A KR1019860003900A KR860003900A KR860009475A KR 860009475 A KR860009475 A KR 860009475A KR 1019860003900 A KR1019860003900 A KR 1019860003900A KR 860003900 A KR860003900 A KR 860003900A KR 860009475 A KR860009475 A KR 860009475A
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silicon
layer
etching
mask
resist
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KR1019860003900A
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KR940000913B1 (ko
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운 탐 시몬
포울 리이드 로날드
유엔 쿠이 옹 제리
닌-큐 왕 데비드
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어플라이드 머티어리얼 인코포레이션
제임스 더블유, 백라이
어플 라이드 머티어리얼 인코포레이션
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H01L21/3083—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
    • H01L21/3086—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/26—Processing photosensitive materials; Apparatus therefor
    • G03F7/40—Treatment after imagewise removal, e.g. baking
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/31058—After-treatment of organic layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31127—Etching organic layers
    • H01L21/31133—Etching organic layers by chemical means
    • H01L21/31138—Etching organic layers by chemical means by dry-etching

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Drying Of Semiconductors (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • ing And Chemical Polishing (AREA)

Abstract

내용 없음

Description

플라즈마 에칭에 관한 원지 포토레지스트의 캡핑 프로세스
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 공업적으로 이용가능한 에치 반응장치에 대한 도면.
* 도면의 주요부분에 대한 부호의 설명
10 : 이온보조 플라즈마 에칭 반응장치 시스템 11 : 금속벽(양극)
12 : 가스유량모듀울 13 : 가스유입
14 : 구가스분배링 또는 메니폴드 15, 16 : 배기포오트
17 : 가변 도로틀 밸브 18 : 압력센서
19 : 터어보 모레큐우러 펌프 20 : 기계식 펌프
22 : 크리오 펌프 23 : 웨이퍼스
24 : 육각형 전극 또는 육극관 25 : RF 발전기
26 : RF 매칭 네트워크 31 : 폴리 실리콘 층
32 : 선 또는 구조 33 : 기판
34 : 로코스고립 산화물 35 : 산화물층
36 : 레지스트 마스크 37 : 캡핑 복합체
38 : 캡핑층 불활성

Claims (8)

  1. 마스크 위에 실리콘 함유 코우팅을 형성시키기 위해서, 실리콘-에칭종을 함유한 플라즈마에 마스크를 노출 : 그리고 그 코우팅을 선택적으로 산화시키기 위해서, 실리콘-에칭종을 함유한 산화성 플라즈마에 그 코우팅을 노출시키는 것으로 구성됨을 특징으로 하는, 밑에 깔려 있는 실리콘-함유층의 에칭에 대한 유기물 마스크의 저항을 증가시키기 위해서 유기물 마스크를 조절하는 프로세스.
  2. 마스크를 실리콘층 위에 배치하고 : 마스크 위에 실리콘-염소 복합체를 함유한 층을 형성시키기 위해서, 레지스트 에치 마스크층을 염소함유 가스에 노출하고 : 실리콘-함유층을 산화시키기 위해서, 그 복합재료를 실리콘 에칭종을 함유한 산화성 가스혼합물에 노출시켜서, 레지스트층 위에 같은 형상의 에치저항 캡핑층을 형성시키는 것으로 구성됨을 특징으로 하는 에치저항을 증가시키기 위해서 레지스트 에치 마스크층을 조절하는 프로세스.
  3. 제 2 항에 있어서, 염소-함유가스가 HCl과 BCl3중에서 적어도 하나로부터 선택됨을 특징으로 하는 프로세스.
  4. 제 2 항에 있어서, 염소-함유가스가 HCl과 BCl3의 혼합물로 이루어짐을 특징으로 하는 프로세스.
  5. 제 2 항에 있어서, 산소가 산화성 가스혼합물에서 우세한 산화성 성분인 것을 특징으로 하는 프로세스.
  6. 제 2 항에 있어서, 산화성 가스혼합물에서 우세한 에칭성분이 HCl인 것을 특징으로 하는 프로세스.
  7. 밀폐형 플라즈마 에칭 방에서 실리콘-함유층을 레지스트 마스크와 염소처리된 에칭가스를 사용하여 에칭하는 과정에서, 다음으로 구성됨을 특징으로 하는 에칭하기 위한 레지스트 마스트를 준비하는 단계 : 레지스트를 실리콘-함유층에 배치, 여기서 실리콘-함유층을 방내에 있는 한쌍의 전극 구조물 중의 하나에 배열 : 첫째 조절단계로서, BCl3와 HCl 중의 적어도 하나로부터 선택된 염소처리된 가스로 이루어진 반응성 가스 혼합물을 상기의 방 안으로 전달 : 실리콘-함유층을 에칭시키며 레지스트 위에 실리콘-과 염소-함유층을 형성시키기 위한 상기의 반응성 가스 혼합물의 플라즈마를 만들기 위해서 RF 전기에너지를 상기 전극 중의 하나의 공급 : 다음의 조절 단계로서, 실리콘-함유층을 산화시키기 위한 산소-함유종과 실리콘-함유층을 에칭시키기 위한 에칭종으로 구성된 반응성 가스혼합물을 상기 실 안으로 전달.
  8. 제 7 항에 있어서, 산소-함유종이 산소이고 에칭종이 HCl인 것을 특징으로 하는 프로세스.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019860003900A 1985-05-20 1986-05-20 플라즈마 에칭에 관한 원상태 포토레지스트의 캡핑방법 KR940000913B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US736,435 1985-05-20
US736435 1985-05-20
US06/736,435 US4613400A (en) 1985-05-20 1985-05-20 In-situ photoresist capping process for plasma etching

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KR860009475A true KR860009475A (ko) 1986-12-23
KR940000913B1 KR940000913B1 (ko) 1994-02-04

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US (1) US4613400A (ko)
EP (1) EP0202907B1 (ko)
JP (1) JP2553513B2 (ko)
KR (1) KR940000913B1 (ko)
DE (1) DE3686092T2 (ko)

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Publication number Publication date
US4613400A (en) 1986-09-23
EP0202907B1 (en) 1992-07-22
JPS6230890A (ja) 1987-02-09
EP0202907A3 (en) 1988-07-27
DE3686092D1 (de) 1992-08-27
DE3686092T2 (de) 1993-01-07
KR940000913B1 (ko) 1994-02-04
EP0202907A2 (en) 1986-11-26
JP2553513B2 (ja) 1996-11-13

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