DE3686092D1 - Verfahren zur in-situ-herstellung einer schutzschicht auf photolack fuer plasmaaetzen. - Google Patents
Verfahren zur in-situ-herstellung einer schutzschicht auf photolack fuer plasmaaetzen.Info
- Publication number
- DE3686092D1 DE3686092D1 DE8686303796T DE3686092T DE3686092D1 DE 3686092 D1 DE3686092 D1 DE 3686092D1 DE 8686303796 T DE8686303796 T DE 8686303796T DE 3686092 T DE3686092 T DE 3686092T DE 3686092 D1 DE3686092 D1 DE 3686092D1
- Authority
- DE
- Germany
- Prior art keywords
- photolack
- plasma
- protective layer
- situ production
- situ
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000011065 in-situ storage Methods 0.000 title 1
- 238000004519 manufacturing process Methods 0.000 title 1
- 238000000034 method Methods 0.000 title 1
- 239000011241 protective layer Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
- H01L21/3083—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
- H01L21/3086—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
-
- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/26—Processing photosensitive materials; Apparatus therefor
- G03F7/40—Treatment after imagewise removal, e.g. baking
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/31058—After-treatment of organic layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31127—Etching organic layers
- H01L21/31133—Etching organic layers by chemical means
- H01L21/31138—Etching organic layers by chemical means by dry-etching
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US06/736,435 US4613400A (en) | 1985-05-20 | 1985-05-20 | In-situ photoresist capping process for plasma etching |
Publications (2)
Publication Number | Publication Date |
---|---|
DE3686092D1 true DE3686092D1 (de) | 1992-08-27 |
DE3686092T2 DE3686092T2 (de) | 1993-01-07 |
Family
ID=24959844
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8686303796T Expired - Fee Related DE3686092T2 (de) | 1985-05-20 | 1986-05-19 | Verfahren zur in-situ-herstellung einer schutzschicht auf photolack fuer plasmaaetzen. |
Country Status (5)
Country | Link |
---|---|
US (1) | US4613400A (de) |
EP (1) | EP0202907B1 (de) |
JP (1) | JP2553513B2 (de) |
KR (1) | KR940000913B1 (de) |
DE (1) | DE3686092T2 (de) |
Families Citing this family (33)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6784033B1 (en) | 1984-02-15 | 2004-08-31 | Semiconductor Energy Laboratory Co., Ltd. | Method for the manufacture of an insulated gate field effect semiconductor device |
US5780313A (en) * | 1985-02-14 | 1998-07-14 | Semiconductor Energy Laboratory Co., Ltd. | Method of fabricating semiconductor device |
DE3514094A1 (de) * | 1985-04-16 | 1986-10-23 | Schering AG, Berlin und Bergkamen, 1000 Berlin | Herstellung metallischer strukturen auf anorganischen nichtleitern |
US6673722B1 (en) | 1985-10-14 | 2004-01-06 | Semiconductor Energy Laboratory Co., Ltd. | Microwave enhanced CVD system under magnetic field |
US6230650B1 (en) | 1985-10-14 | 2001-05-15 | Semiconductor Energy Laboratory Co., Ltd. | Microwave enhanced CVD system under magnetic field |
FR2604188B1 (fr) * | 1986-09-18 | 1992-11-27 | Framatome Sa | Element tubulaire en acier inoxydable presentant une resistance a l'usure amelioree |
US4717448A (en) * | 1986-10-09 | 1988-01-05 | International Business Machines Corporation | Reactive ion etch chemistry for providing deep vertical trenches in semiconductor substrates |
US4750980A (en) * | 1986-11-07 | 1988-06-14 | Texas Instruments Incorporated | Process for etching tin oxide |
EP0272143B1 (de) * | 1986-12-19 | 1999-03-17 | Applied Materials, Inc. | Bromine-Ätzverfahren für Silizium |
US4778563A (en) * | 1987-03-26 | 1988-10-18 | Applied Materials, Inc. | Materials and methods for etching tungsten polycides using silicide as a mask |
DE3873848T2 (de) * | 1987-07-16 | 1993-03-11 | Texas Instruments Inc | Behandlungsapparat und -verfahren. |
JP2947818B2 (ja) * | 1988-07-27 | 1999-09-13 | 株式会社日立製作所 | 微細孔への金属穴埋め方法 |
US4978594A (en) * | 1988-10-17 | 1990-12-18 | International Business Machines Corporation | Fluorine-containing base layer for multi-layer resist processes |
DE68923247T2 (de) * | 1988-11-04 | 1995-10-26 | Fujitsu Ltd | Verfahren zum Erzeugen eines Fotolackmusters. |
US6008133A (en) * | 1991-04-04 | 1999-12-28 | Hitachi, Ltd. | Method and apparatus for dry etching |
US5610753A (en) * | 1991-12-12 | 1997-03-11 | Eastman Kodak Company | Optical design of laser scanner to reduce thermal sensitivity |
FR2695410B1 (fr) * | 1992-09-04 | 1994-11-18 | France Telecom | Procédé de prétraitement d'un substrat pour le dépôt sélectif de tungstène. |
JPH09501612A (ja) * | 1994-04-08 | 1997-02-18 | マーク エー. レイ, | 選択的プラズマ成長 |
US5767017A (en) * | 1995-12-21 | 1998-06-16 | International Business Machines Corporation | Selective removal of vertical portions of a film |
US6139647A (en) * | 1995-12-21 | 2000-10-31 | International Business Machines Corporation | Selective removal of vertical portions of a film |
US6025268A (en) * | 1996-06-26 | 2000-02-15 | Advanced Micro Devices, Inc. | Method of etching conductive lines through an etch resistant photoresist mask |
US5942446A (en) * | 1997-09-12 | 1999-08-24 | Taiwan Semiconductor Manufacturing Company, Ltd. | Fluorocarbon polymer layer deposition predominant pre-etch plasma etch method for forming patterned silicon containing dielectric layer |
US5801083A (en) * | 1997-10-20 | 1998-09-01 | Chartered Semiconductor Manufacturing, Ltd. | Use of polymer spacers for the fabrication of shallow trench isolation regions with rounded top corners |
US6121154A (en) * | 1997-12-23 | 2000-09-19 | Lam Research Corporation | Techniques for etching with a photoresist mask |
US6103596A (en) * | 1998-02-19 | 2000-08-15 | Taiwan Semiconductor Manufacturing Company | Process for etching a silicon nitride hardmask mask with zero etch bias |
JP2002510878A (ja) | 1998-04-02 | 2002-04-09 | アプライド マテリアルズ インコーポレイテッド | 低k誘電体をエッチングする方法 |
US6291357B1 (en) | 1999-10-06 | 2001-09-18 | Applied Materials, Inc. | Method and apparatus for etching a substrate with reduced microloading |
TW200409230A (en) * | 2002-11-28 | 2004-06-01 | Au Optronics Corp | Method for avoiding non-uniform etching of silicon layer |
US20040224524A1 (en) * | 2003-05-09 | 2004-11-11 | Applied Materials, Inc. | Maintaining the dimensions of features being etched on a lithographic mask |
KR100510558B1 (ko) * | 2003-12-13 | 2005-08-26 | 삼성전자주식회사 | 패턴 형성 방법 |
US20060000796A1 (en) * | 2004-06-30 | 2006-01-05 | Elliot Tan | Method for controlling critical dimensions and etch bias |
US7709391B2 (en) * | 2006-01-20 | 2010-05-04 | Applied Materials, Inc. | Methods for in-situ generation of reactive etch and growth specie in film formation processes |
CN104465386A (zh) * | 2013-09-24 | 2015-03-25 | 中芯国际集成电路制造(北京)有限公司 | 半导体结构的形成方法 |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4255230A (en) * | 1980-02-22 | 1981-03-10 | Eaton Corporation | Plasma etching process |
NL8004007A (nl) * | 1980-07-11 | 1982-02-01 | Philips Nv | Werkwijze voor het vervaardigen van een halfgeleider- inrichting. |
US4333793A (en) * | 1980-10-20 | 1982-06-08 | Bell Telephone Laboratories, Incorporated | High-selectivity plasma-assisted etching of resist-masked layer |
JPS6059302B2 (ja) * | 1981-05-26 | 1985-12-24 | インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション | 多量の酸素を用いた反応性イオン食刻法 |
US4450042A (en) * | 1982-07-06 | 1984-05-22 | Texas Instruments Incorporated | Plasma etch chemistry for anisotropic etching of silicon |
JPS59141228A (ja) * | 1983-02-01 | 1984-08-13 | Mitsubishi Electric Corp | 微細パタ−ン形成方法 |
US4468285A (en) * | 1983-12-22 | 1984-08-28 | Advanced Micro Devices, Inc. | Plasma etch process for single-crystal silicon with improved selectivity to silicon dioxide |
-
1985
- 1985-05-20 US US06/736,435 patent/US4613400A/en not_active Expired - Lifetime
-
1986
- 1986-05-19 DE DE8686303796T patent/DE3686092T2/de not_active Expired - Fee Related
- 1986-05-19 EP EP86303796A patent/EP0202907B1/de not_active Expired - Lifetime
- 1986-05-20 KR KR1019860003900A patent/KR940000913B1/ko not_active IP Right Cessation
- 1986-05-20 JP JP61116014A patent/JP2553513B2/ja not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0202907A3 (en) | 1988-07-27 |
US4613400A (en) | 1986-09-23 |
JPS6230890A (ja) | 1987-02-09 |
EP0202907B1 (de) | 1992-07-22 |
JP2553513B2 (ja) | 1996-11-13 |
KR860009475A (ko) | 1986-12-23 |
EP0202907A2 (de) | 1986-11-26 |
KR940000913B1 (ko) | 1994-02-04 |
DE3686092T2 (de) | 1993-01-07 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |