KR860003756A - 전자회로 장치와 그 제조방법 - Google Patents

전자회로 장치와 그 제조방법 Download PDF

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Publication number
KR860003756A
KR860003756A KR1019850006974A KR850006974A KR860003756A KR 860003756 A KR860003756 A KR 860003756A KR 1019850006974 A KR1019850006974 A KR 1019850006974A KR 850006974 A KR850006974 A KR 850006974A KR 860003756 A KR860003756 A KR 860003756A
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South Korea
Prior art keywords
melting point
electronic circuit
high melting
soldering
point solder
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KR1019850006974A
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English (en)
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KR900000183B1 (ko
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료헤이 사도 (외 5)
Original Assignee
미쓰다 가쓰시게
가부시기 가이샤 히다찌 세이사꾸쇼
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Publication of KR860003756A publication Critical patent/KR860003756A/ko
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Publication of KR900000183B1 publication Critical patent/KR900000183B1/ko

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    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
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    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
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    • H01L2924/156—Material
    • H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16195—Flat cap [not enclosing an internal cavity]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19041—Component type being a capacitor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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    • H—ELECTRICITY
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    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10636—Leadless chip, e.g. chip capacitor or resistor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
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    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
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    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10954—Other details of electrical connections
    • H05K2201/10992—Using different connection materials, e.g. different solders, for the same connection
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    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
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    • H05K2203/01—Tools for processing; Objects used during processing
    • H05K2203/0104—Tools for processing; Objects used during processing for patterning or coating
    • H05K2203/0108—Male die used for patterning, punching or transferring
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    • H05K2203/03—Metal processing
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    • H05K2203/03—Metal processing
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    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
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Abstract

내용 없음

Description

전자회로 장치와 그 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제7도는, 본 발명의 1실시예를 도시한 전자회로 장치의 사시도.
제8도는, 제7도의 A-A′ 단면도.
제10도는, 본 발명의 또 다른 1 실시예를 도시한 세라믹 팩케이지의 단면도.

Claims (12)

  1. 기판과, 상기 기판 위에 올려짐과 동시에, 납땜에 의해 상기 기판에 접속된 구성체로 되는 전자회로 장치에 있어서, 상기 납땜이, 낮은 융점 납땜부분과 가공 및 연처리된 높은 융점 납땜부분에 의해 구성됨과 동시에, 상기 높은 융점 납땜 부분이 상기 기판 및 구성체의 각각과, 상기 낮은 융점 납땜부분을 거쳐서 접속되도록 되어 있는 것을 특징으로 하는 전자회로 장치.
  2. 특허청구의 범위 제1항에 있어서, 상기 구성체를 전자회로 부품으로 하고, 상기 기판을 전자회로 기판으로 한 것을 특징으로 하는 전자회로 장치.
  3. 특허청구의 범위 제1항에 있어서, 상기 구성체를 반도체 칩으로 하고, 상기 기판을 상기 반도체 칩을 울런 놓을 전자회로 기판으로 한 것을 특징으로 하는 전자회로 장치.
  4. 특허청구의 범위 제1항에 있어서, 전자회로기판 위에 올려 놓여짐과 동시에, 상기 기판에, 제1의 납땜으로 접속된 전자회로 부품과, 상기 전자 회로 부품을 덮은 캡과, 상기 전자회로 기판이, 제2의 납땜으로 접속되도록 구성함과 동시에, 상기 제1 및 제2의 납땜의 적어도 한쪽이, 가공 및 열처리 한 높은 융점인 납땜 부분과, 낮은 융점인 납땜 부분에 의해 구성된 것을 특징으로 하는 전자회로 장치.
  5. 기판과, 상기 기판 위에 올려 놓여짐과 동시에, 상기 기판에 접속하여야할 구성체를 납땜에 의해 접속하는 방법에 있어서, 상기 납땜을, 낮은 융점 납땜 부분과, 가공 열처리한 높은 융점 납땜 부분에 의해 구성함과 동시에, 상기 높은 융점 납땜 부분과, 접속하여야 할 대상물과의 사이에 낮은 융점 납땜을 개재시키는 공정과, 상기 낮은 융점 납땜을 용융해서, 상기 높은 융점 납땜 부분과 접속하여야 할 대상물과를 접속하는 공정으로 되는 것은 특징으로 하는 전자회로 장치의 제조방법.
  6. 상기 높은 융점 납땜부분의 소정 위치와, 접속하여야 할 대상물과의 사이에, 낮은 융점 납땜을 개재시키는 공정과, 사전에 상기 높은 융점인 납땜의 소정위치에 낮은 융점인 납땜을 융착하여 둠으로서 실행시키도록한 것을 특징으로 하는 전자회로 장치의 제조방법.
  7. 특허청구의 범위 제5항에 있어서, 상기 높은 융점 납땜부분의 소정 위치와, 접속하여야 할 대상물의 소정 위치와의 사이에, 낮은 융점 납땜을 개재시키는 공정을, 사전에, 상기 접속하여야 할 대상물의 소정위치에 낮은 융점 납땜을 융착하여 두는 것에 의해, 신행시키도록 한 것을 특징으로 하는 전자 회로 장치의 제조방법.
  8. 특허청구의 범위 제5항에 있어서, 상기 구성체를 전자회로 부품으로 하고, 상기 기판을 전자회로 기판으로 함과 동시에, 상기 높은 융점 납땜과, 상기 전자회로부품 및 회로 기판과의 사이에, 낮은 융점 납땜을 끼우는 공정과, 상기 높은 융점 납땜의 융점보다 낮으며, 또한 상기 낮은 융점 납땜을 용융할 수 있는 온도를 가열해서, 상기 낮은 융점 납땜을 용융하여 상기 회로부품과 회로기판을 접속하는 공정으로 되는 것을 특징으로 하는 전자회로 장치의 제조방법.
  9. 특허청구의 범위 제5항에 있어서, 상기 기판을 전자회로 기판으로 하고, 상기 구성체를 상기 전자회로 기판과 접속되여 올려 놓여진 전자회로 부품을 덮는 캡으로 함과 동시에, 상기 높은 융점 납땜과 상기 캡 및 회로 기판과의 사이에 낮은 융점 납땜을 끼우는 공정과, 상기 높은 융점 납땜의 융점보다 낮으며, 또한 상기 낮은 융점 납땜을, 용융할 수 있는 온도로 가열해서, 상기 낮은 융점 납땜을 용융해서 상기 캡과 회로기판을 접속하는 공정을 가진 것을 특징으로 하는 전자회로 기판의 제조방법.
  10. 특허청구의 범위 제5항에 있어서, 상기 높은 융점 납땜을 사전에 시이트 상태로 가공하여, 그 한끝면을 해당 높은 융점 납땜보다 낮은 온도에서 용해가 가능한 받침판으로 보강하는 공정과, 상기 보강된 구성체의 상기 높은 융점 납땜 면의 쪽에서 홈을 잘러서, 그 홈의 깊이가 높은 융점 납땜 부분을 지나고, 그의 높은 융점 납땜에 인접하는 상기 받침판의 일부가 남을 정도가 되도록 하는 공정과, 상기 높은 융점 납땜 부분의 끝면에 부착시킨 낮은 융점 납땜을 거쳐서 접속하여야 할 대상물과 상기 높은 융점 납땜부분을 접속하는 공정을 가진 것을 특징으로 하는 전자회로 기판의 제조방법.
  11. 특허청구의 범위 제5항에 있어서, 상기 높은 융점 납땜을, 사전에 시이트 상태로 가공해서, 그 한끝면을 해당 높은 융점 납땜보다 낮은 온도에서 용융이 가능한 받침판으로 보강하는 공정과, 상기 보강된 구성체의 상기 높은 융점 납땜면의 쪽에서 홈을 잘르고, 그 홈의 깊이가 높은 융점 납땜 부분을 지나, 이 높은 융점 납땜에 인접하는 상기 받침판의 일부가 남을 정도가 되도록 하는 공정과, 상기 높은 융점 납땜부분의 한쪽의 끝면에 부착시킨 낮은 융점 납땜을 거쳐서 접속하여야 할 제1의 대상물과, 상기 높은 융점 납땜 부분과를 접속하는 공정과, 상기 받침판을 제거하는 공정과, 상기 제거에 의해 남겨진 높은 융점 납땜부분의 다른쪽의 끝면에 부착시킨 낮은 융점 납땜을 거쳐서, 접속하여야 할 제2의 대상물과, 상기 높은 융점 납땜부분과를 접속하는 공정을 가진 것을 특징으로 하는 전자회로 기판의 제조방법.
  12. 특허청구의 범위 제6항에 있어서, 상기 기판과 전자회로 구성체를 높은 융점 납땜으로 접속할 경우에, 높은 융점 납땜과 접속하여야 할, 상기 전자회로 구성체의 도체 패턴에 일치한 구멍의 열린 마스크를 사용해서, 상기 높은 융점의 납땜을, 상기 회로기판과 상기 전자회로 구성체와의 사이의 소정위치로 공급하도록 한 것을 특징으로 하는 전자회로 기판의 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019850006974A 1984-10-05 1985-09-24 전자회로 장치와 그 제조방법 KR900000183B1 (ko)

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DE3581251D1 (de) 1991-02-14
CN85108637A (zh) 1986-07-09
EP0177042A3 (en) 1988-08-17
CN85108637B (zh) 1988-03-09
US4673772A (en) 1987-06-16
JPH0528000B2 (ko) 1993-04-22
EP0177042B1 (en) 1991-01-09
EP0177042A2 (en) 1986-04-09
KR900000183B1 (ko) 1990-01-23
JPS6187396A (ja) 1986-05-02

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