KR20200144182A - 매립 게이트 구조를 구비한 반도체 장치 및 그 제조 방법 - Google Patents

매립 게이트 구조를 구비한 반도체 장치 및 그 제조 방법 Download PDF

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KR20200144182A
KR20200144182A KR1020190071564A KR20190071564A KR20200144182A KR 20200144182 A KR20200144182 A KR 20200144182A KR 1020190071564 A KR1020190071564 A KR 1020190071564A KR 20190071564 A KR20190071564 A KR 20190071564A KR 20200144182 A KR20200144182 A KR 20200144182A
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South Korea
Prior art keywords
gate
diffused
insulating layer
dipole
silicon oxide
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KR1020190071564A
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English (en)
Korean (ko)
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김동수
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에스케이하이닉스 주식회사
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Priority to KR1020190071564A priority Critical patent/KR20200144182A/ko
Priority to US16/691,335 priority patent/US11183579B2/en
Priority to CN201911239968.9A priority patent/CN112103341B/zh
Publication of KR20200144182A publication Critical patent/KR20200144182A/ko
Priority to US17/516,395 priority patent/US11935939B2/en

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US16/691,335 US11183579B2 (en) 2019-06-17 2019-11-21 Semiconductor device having buried gate structure and method for fabricating the same
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