KR20190044008A - 기판 처리 장치, 기판 처리 방법 및 프로그램 - Google Patents
기판 처리 장치, 기판 처리 방법 및 프로그램 Download PDFInfo
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- KR20190044008A KR20190044008A KR1020180123978A KR20180123978A KR20190044008A KR 20190044008 A KR20190044008 A KR 20190044008A KR 1020180123978 A KR1020180123978 A KR 1020180123978A KR 20180123978 A KR20180123978 A KR 20180123978A KR 20190044008 A KR20190044008 A KR 20190044008A
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- 239000000758 substrate Substances 0.000 title claims abstract description 163
- 238000012545 processing Methods 0.000 title claims abstract description 135
- 238000003672 processing method Methods 0.000 title claims abstract description 7
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 claims abstract description 278
- 238000005530 etching Methods 0.000 claims abstract description 192
- 229910000147 aluminium phosphate Inorganic materials 0.000 claims abstract description 139
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 134
- 239000010703 silicon Substances 0.000 claims abstract description 134
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 133
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- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical group O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 24
- 229910052814 silicon oxide Inorganic materials 0.000 claims abstract description 23
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- 238000010586 diagram Methods 0.000 description 4
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- 238000001816 cooling Methods 0.000 description 2
- BHEPBYXIRTUNPN-UHFFFAOYSA-N hydridophosphorus(.) (triplet) Chemical compound [PH] BHEPBYXIRTUNPN-UHFFFAOYSA-N 0.000 description 2
- 239000003112 inhibitor Substances 0.000 description 2
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- LXPCOISGJFXEJE-UHFFFAOYSA-N oxifentorex Chemical group C=1C=CC=CC=1C[N+](C)([O-])C(C)CC1=CC=CC=C1 LXPCOISGJFXEJE-UHFFFAOYSA-N 0.000 description 1
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Abstract
Description
도 2는 실시 형태에 따른 에칭용의 처리조의 구성을 나타내는 개략 블록도이다.
도 3a는 에칭 처리를 행하기 전의 기판의 단면을 나타내는 개략도이다.
도 3b는 에칭 처리가 진행된 기판의 상태를 나타내는 개략도이다.
도 3c는 에칭 처리가 종료된 기판의 상태를 나타내는 개략도이다.
도 4는 에칭 처리의 인산 농도 제어를 설명하는 순서도이다.
도 5는 에칭 처리의 온도 제어를 설명하는 순서도이다.
도 6은 에칭 처리의 실리콘 농도 제어를 설명하는 순서도이다.
도 7은 에칭액의 온도와 실리콘 포화량과의 관계를 나타내는 맵이다.
도 8은 처리 시간에 대한 에칭액의 온도, 인산 농도 및 실리콘 농도를 나타내는 타임 차트이다.
도 9는 변형예에 따른 에칭용의 처리조의 구성을 나타내는 개략 블록도이다.
6 :로트 처리부
8 : 기판
23 : 에칭 처리 장치(처리부)
27 : 에칭용의 처리조
80 : 온도 센서
81 : 인산 농도 센서
82 : 실리콘 농도 센서
100 : 제어부
Claims (8)
- 인산과 실리콘 함유 화합물을 포함하는 처리액에 기판을 침지시켜 에칭 처리를 행하는 처리부와,
상기 에칭 처리의 제 1 처리 시간에 있어서, 제 1 인산 농도 및 제 1 실리콘 농도인 상기 처리액으로 상기 기판을 처리하고, 상기 제 1 처리 시간보다 후의 제 2 처리 시간에 있어서, 상기 제 1 인산 농도보다 낮은 제 2 정해진 인산 농도 및 상기 제 1 실리콘 농도보다 낮은 제 2 정해진 실리콘 농도인 상기 처리액, 또는 상기 제 2 정해진 인산 농도 및 상기 제 1 실리콘 농도인 상기 처리액으로 상기 기판을 처리하도록 상기 처리액을 제어하는 제어부
를 구비하는 것을 특징으로 하는 기판 처리 장치. - 제 1 항에 있어서,
상기 제어부는,
상기 제 1 처리 시간에 있어서, 제 1 온도인 상기 처리액으로 상기 기판을 처리하고, 상기 제 2 처리 시간에 있어서, 상기 제 1 온도보다 낮은 제 2 온도인 상기 처리액으로 상기 기판을 처리하도록 상기 처리액을 제어하는
것을 특징으로 하는 기판 처리 장치. - 제 2 항에 있어서,
상기 제 1 온도 및 상기 제 2 온도는 상기 처리액이 정해진 비등 상태가 되는 온도인 것을 특징으로 하는 기판 처리 장치. - 제 1 항 내지 제 3 항 중 어느 한 항에 있어서,
상기 제어부는,
미리 설정된 정보에 기초하여 상기 처리액의 일부를 배출하고, 새롭게 액체를 공급하는
것을 특징으로 하는 기판 처리 장치. - 제 1 항 내지 제 3 항 중 어느 한 항에 있어서,
상기 제어부는,
상기 처리액의 실리콘 농도에 기초하여 상기 처리액의 일부를 배출하고, 새롭게 액체를 공급하는
것을 특징으로 하는 기판 처리 장치. - 제 1 항 내지 제 3 항 중 어느 한 항에 있어서,
상기 제어부는,
상기 에칭 처리를 개시하고 나서 정해진 기간의 사이, 인산 농도를 상기 기판의 실리콘 산화막을 에칭하는 정해진 농도 이상으로 유지하는
것을 특징으로 하는 기판 처리 장치. - 인산과 실리콘 함유 화합물을 포함하는 처리액에 기판을 침지시켜 에칭 처리를 행할 시, 상기 에칭 처리의 제 1 처리 시간에 있어서, 제 1 인산 농도 및 제 1 실리콘 농도인 상기 처리액으로 상기 기판을 처리하는 공정과,
상기 제 1 처리 시간보다 후의 제 2 처리 시간에 있어서, 상기 제 1 인산 농도보다 낮은 제 2 정해진 인산 농도 및 상기 제 1 실리콘 농도보다 낮은 제 2 정해진 실리콘 농도인 상기 처리액, 또는 상기 제 2 정해진 인산 농도 및 상기 제 1 실리콘 농도인 상기 처리액으로 상기 기판을 처리하는 공정
을 포함하는 것을 특징으로 하는 기판 처리 방법. - 제 7 항에 기재된 기판 처리 방법을 컴퓨터에 실행시키는, 컴퓨터 판독 가능한 기억 매체에 기록된 프로그램.
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Application Number | Priority Date | Filing Date | Title |
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KR102449897B1 (ko) * | 2022-01-14 | 2022-09-30 | 삼성전자주식회사 | 습식 식각 방법 및 이를 이용한 반도체 소자 제조 방법. |
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KR102759372B1 (ko) * | 2019-01-08 | 2025-01-24 | 삼성전자주식회사 | 실리콘 질화물용 식각제 조성물 및 반도체 소자의 제조 방법 |
JP7624864B2 (ja) | 2020-05-25 | 2025-01-31 | 東京エレクトロン株式会社 | 基板処理装置および基板処理方法 |
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