KR20090116646A - 실리콘 웨이퍼 및 이의 제조방법 - Google Patents

실리콘 웨이퍼 및 이의 제조방법 Download PDF

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Publication number
KR20090116646A
KR20090116646A KR1020090039209A KR20090039209A KR20090116646A KR 20090116646 A KR20090116646 A KR 20090116646A KR 1020090039209 A KR1020090039209 A KR 1020090039209A KR 20090039209 A KR20090039209 A KR 20090039209A KR 20090116646 A KR20090116646 A KR 20090116646A
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KR
South Korea
Prior art keywords
silicon wafer
layer
oxygen precipitate
wafer
active layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
KR1020090039209A
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English (en)
Korean (ko)
Inventor
타카아키 시오타
타카시 나카야먀
토모유키 카바사와
Original Assignee
가부시키가이샤 사무코
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Publication date
Application filed by 가부시키가이샤 사무코 filed Critical 가부시키가이샤 사무코
Publication of KR20090116646A publication Critical patent/KR20090116646A/ko
Ceased legal-status Critical Current

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P36/00Gettering within semiconductor bodies
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P36/00Gettering within semiconductor bodies
    • H10P36/20Intrinsic gettering, i.e. thermally inducing defects by using oxygen present in the silicon body
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/20Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/12Preparing bulk and homogeneous wafers
    • H10P90/129Preparing bulk and homogeneous wafers by polishing

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  • Mechanical Treatment Of Semiconductor (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Silicon Compounds (AREA)
KR1020090039209A 2008-05-07 2009-05-06 실리콘 웨이퍼 및 이의 제조방법 Ceased KR20090116646A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JPJP-P-2008-121716 2008-05-07
JP2008121716A JP5584959B2 (ja) 2008-05-07 2008-05-07 シリコンウェーハの製造方法

Publications (1)

Publication Number Publication Date
KR20090116646A true KR20090116646A (ko) 2009-11-11

Family

ID=40752373

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020090039209A Ceased KR20090116646A (ko) 2008-05-07 2009-05-06 실리콘 웨이퍼 및 이의 제조방법

Country Status (6)

Country Link
US (1) US7960253B2 (enExample)
EP (1) EP2117038B1 (enExample)
JP (1) JP5584959B2 (enExample)
KR (1) KR20090116646A (enExample)
SG (1) SG157294A1 (enExample)
TW (1) TWI423338B (enExample)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010109873A1 (ja) * 2009-03-25 2010-09-30 株式会社Sumco シリコンウェーハおよびその製造方法
DE102015220924B4 (de) * 2015-10-27 2018-09-27 Siltronic Ag Suszeptor zum Halten einer Halbleiterscheibe mit Orientierungskerbe, Verfahren zum Abscheiden einer Schicht auf einer Halbleiterscheibe und Halbleiterscheibe

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3892604B2 (ja) * 1998-11-30 2007-03-14 株式会社東芝 半導体装置
JP3811582B2 (ja) 1999-03-18 2006-08-23 信越半導体株式会社 シリコン基板の熱処理方法およびその基板を用いたエピタキシャルウェーハの製造方法
US6376395B2 (en) * 2000-01-11 2002-04-23 Memc Electronic Materials, Inc. Semiconductor wafer manufacturing process
JP4463957B2 (ja) * 2000-09-20 2010-05-19 信越半導体株式会社 シリコンウエーハの製造方法およびシリコンウエーハ
JP2003059933A (ja) * 2001-08-15 2003-02-28 Shin Etsu Handotai Co Ltd シリコンエピタキシャルウエーハの製造方法およびシリコンエピタキシャルウエーハ
JP2003257981A (ja) * 2002-02-27 2003-09-12 Toshiba Ceramics Co Ltd シリコンウェーハの製造方法
EP1879224A3 (en) 2002-04-10 2008-10-29 MEMC Electronic Materials, Inc. Process for controlling denuded zone depth in an ideal oxygen precipitating silicon wafer
JP4344517B2 (ja) * 2002-12-27 2009-10-14 富士通株式会社 半導体基板及びその製造方法
KR20040103222A (ko) 2003-05-31 2004-12-08 삼성전자주식회사 두께가 제어된 디누드 존을 갖는 웨이퍼, 이를 제조하는방법 및 웨이퍼의 연마 장치
KR100573473B1 (ko) * 2004-05-10 2006-04-24 주식회사 실트론 실리콘 웨이퍼 및 그 제조방법
KR20070023737A (ko) 2004-06-02 2007-02-28 마이클 포드레스니 잘록한 형태의 회전-스트레칭 롤러 및 그 제조 방법
JP4854936B2 (ja) * 2004-06-15 2012-01-18 信越半導体株式会社 シリコンウエーハの製造方法及びシリコンウエーハ
JP2006040972A (ja) * 2004-07-22 2006-02-09 Shin Etsu Handotai Co Ltd シリコンエピタキシャルウェーハおよびその製造方法
JP2007242920A (ja) * 2006-03-09 2007-09-20 Shin Etsu Handotai Co Ltd 窒素ドープアニールウェーハの製造方法及び窒素ドープアニールウェーハ

Also Published As

Publication number Publication date
EP2117038A2 (en) 2009-11-11
JP2009272443A (ja) 2009-11-19
EP2117038A3 (en) 2010-01-13
US20090278239A1 (en) 2009-11-12
TWI423338B (zh) 2014-01-11
EP2117038B1 (en) 2018-02-28
TW201009945A (en) 2010-03-01
JP5584959B2 (ja) 2014-09-10
SG157294A1 (en) 2009-12-29
US7960253B2 (en) 2011-06-14

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