KR20090109547A - 다중 극성의 반전 가능 전하 펌프 회로 및 관련 방법 - Google Patents

다중 극성의 반전 가능 전하 펌프 회로 및 관련 방법 Download PDF

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Publication number
KR20090109547A
KR20090109547A KR1020097016001A KR20097016001A KR20090109547A KR 20090109547 A KR20090109547 A KR 20090109547A KR 1020097016001 A KR1020097016001 A KR 1020097016001A KR 20097016001 A KR20097016001 A KR 20097016001A KR 20090109547 A KR20090109547 A KR 20090109547A
Authority
KR
South Korea
Prior art keywords
charge pump
voltage
circuit
output
node
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
KR1020097016001A
Other languages
English (en)
Korean (ko)
Inventor
알리 알-샴마
로이 이. 슈어라인
Original Assignee
쌘디스크 3디 엘엘씨
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US11/618,838 external-priority patent/US7495500B2/en
Priority claimed from US11/618,841 external-priority patent/US7477093B2/en
Application filed by 쌘디스크 3디 엘엘씨 filed Critical 쌘디스크 3디 엘엘씨
Publication of KR20090109547A publication Critical patent/KR20090109547A/ko
Abandoned legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of DC power input into DC power output
    • H02M3/02—Conversion of DC power input into DC power output without intermediate conversion into AC
    • H02M3/04—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters
    • H02M3/06—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider
    • H02M3/07—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode, e.g. charge pumps
    • H02M3/073—Charge pumps of the Schenkel-type
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of DC power input into DC power output
    • H02M3/02—Conversion of DC power input into DC power output without intermediate conversion into AC
    • H02M3/04—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters
    • H02M3/06—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider
    • H02M3/07—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode, e.g. charge pumps
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0038—Power supply circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/145—Applications of charge pumps; Boosted voltage circuits; Clamp circuits therefor
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/093—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal using special filtering or amplification characteristics in the loop
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/70—Resistive array aspects
    • G11C2213/77—Array wherein the memory element being directly connected to the bit lines and word lines without any access device being used
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of DC power input into DC power output
    • H02M3/02—Conversion of DC power input into DC power output without intermediate conversion into AC
    • H02M3/04—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters
    • H02M3/06—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider
    • H02M3/07—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode, e.g. charge pumps
    • H02M3/071—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode, e.g. charge pumps adapted to generate a negative voltage output from a positive voltage source

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Read Only Memory (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Dram (AREA)
KR1020097016001A 2006-12-31 2007-12-19 다중 극성의 반전 가능 전하 펌프 회로 및 관련 방법 Abandoned KR20090109547A (ko)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US11/618,838 US7495500B2 (en) 2006-12-31 2006-12-31 Method for using a multiple polarity reversible charge pump circuit
US11/618,838 2006-12-31
US11/618,841 2006-12-31
US11/618,841 US7477093B2 (en) 2006-12-31 2006-12-31 Multiple polarity reversible charge pump circuit
PCT/US2007/088159 WO2008082994A1 (en) 2006-12-31 2007-12-19 Multiple polarity reversible charge pump circuit and related methods

Publications (1)

Publication Number Publication Date
KR20090109547A true KR20090109547A (ko) 2009-10-20

Family

ID=39588969

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020097016001A Abandoned KR20090109547A (ko) 2006-12-31 2007-12-19 다중 극성의 반전 가능 전하 펌프 회로 및 관련 방법

Country Status (5)

Country Link
EP (1) EP2109936B1 (https=)
JP (1) JP5273681B2 (https=)
KR (1) KR20090109547A (https=)
TW (1) TWI360131B (https=)
WO (1) WO2008082994A1 (https=)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7902915B2 (en) * 2009-06-08 2011-03-08 Freescale Semiconductor, Inc. Method and circuit for charging and discharging a circuit node
KR101024632B1 (ko) 2009-11-12 2011-03-25 매그나칩 반도체 유한회사 차지펌프 회로 및 이의 차지펌핑 방법
US8897073B2 (en) * 2012-09-14 2014-11-25 Freescale Semiconductor, Inc. NVM with charge pump and method therefor
TWI486929B (zh) * 2013-05-13 2015-06-01 Sitronix Technology Corp Can produce self-voltage or negative voltage switching circuit

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5602794A (en) * 1995-09-29 1997-02-11 Intel Corporation Variable stage charge pump
KR0179852B1 (ko) * 1995-10-25 1999-04-15 문정환 차지 펌프 회로
JP2845206B2 (ja) * 1996-08-15 1999-01-13 日本電気株式会社 高電圧発生回路
JP3580693B2 (ja) * 1998-03-19 2004-10-27 シャープ株式会社 チャージ・ポンプ回路
JP4026947B2 (ja) * 1998-08-24 2007-12-26 株式会社ルネサステクノロジ 昇圧回路
US6452438B1 (en) * 2000-12-28 2002-09-17 Intel Corporation Triple well no body effect negative charge pump
US6914791B1 (en) * 2002-11-06 2005-07-05 Halo Lsi, Inc. High efficiency triple well charge pump circuit
JP2005129815A (ja) * 2003-10-27 2005-05-19 Nec Kansai Ltd チャージポンプ回路
US6980045B1 (en) * 2003-12-05 2005-12-27 Xilinx, Inc. Merged charge pump

Also Published As

Publication number Publication date
JP2010515423A (ja) 2010-05-06
JP5273681B2 (ja) 2013-08-28
TWI360131B (en) 2012-03-11
EP2109936A4 (en) 2011-09-28
EP2109936B1 (en) 2014-04-16
EP2109936A1 (en) 2009-10-21
TW200842888A (en) 2008-11-01
WO2008082994A1 (en) 2008-07-10

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Legal Events

Date Code Title Description
PA0105 International application

Patent event date: 20090729

Patent event code: PA01051R01D

Comment text: International Patent Application

PG1501 Laying open of application
A201 Request for examination
PA0201 Request for examination

Patent event code: PA02012R01D

Patent event date: 20121218

Comment text: Request for Examination of Application

E701 Decision to grant or registration of patent right
PE0701 Decision of registration

Patent event code: PE07011S01D

Comment text: Decision to Grant Registration

Patent event date: 20131209

NORF Unpaid initial registration fee
PC1904 Unpaid initial registration fee