KR20080035150A - 박막 트랜지스터 기판의 제조 방법 - Google Patents

박막 트랜지스터 기판의 제조 방법 Download PDF

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Publication number
KR20080035150A
KR20080035150A KR1020060101428A KR20060101428A KR20080035150A KR 20080035150 A KR20080035150 A KR 20080035150A KR 1020060101428 A KR1020060101428 A KR 1020060101428A KR 20060101428 A KR20060101428 A KR 20060101428A KR 20080035150 A KR20080035150 A KR 20080035150A
Authority
KR
South Korea
Prior art keywords
etching
reaction
pattern
active layer
photoresist pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
KR1020060101428A
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English (en)
Korean (ko)
Inventor
최승하
김상갑
오민석
최신일
김대옥
진홍기
정영호
정유광
Original Assignee
삼성전자주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 삼성전자주식회사 filed Critical 삼성전자주식회사
Priority to KR1020060101428A priority Critical patent/KR20080035150A/ko
Priority to JP2007044999A priority patent/JP2008103658A/ja
Priority to EP07016072A priority patent/EP1914802A2/en
Priority to TW096131096A priority patent/TW200820446A/zh
Priority to US11/874,098 priority patent/US20080093334A1/en
Priority to CNA2007101671041A priority patent/CN101165882A/zh
Publication of KR20080035150A publication Critical patent/KR20080035150A/ko
Withdrawn legal-status Critical Current

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041Cleaning
    • H01L21/02057Cleaning during device manufacture
    • H01L21/02068Cleaning during device manufacture during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0312Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] characterised by the gate electrodes
    • H10D30/0316Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] characterised by the gate electrodes of lateral bottom-gate TFTs comprising only a single gate
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01Manufacture or treatment
    • H10D86/021Manufacture or treatment of multiple TFTs
    • H10D86/0231Manufacture or treatment of multiple TFTs using masks, e.g. half-tone masks
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Thin Film Transistor (AREA)
  • Cleaning Or Drying Semiconductors (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Drying Of Semiconductors (AREA)
KR1020060101428A 2006-10-18 2006-10-18 박막 트랜지스터 기판의 제조 방법 Withdrawn KR20080035150A (ko)

Priority Applications (6)

Application Number Priority Date Filing Date Title
KR1020060101428A KR20080035150A (ko) 2006-10-18 2006-10-18 박막 트랜지스터 기판의 제조 방법
JP2007044999A JP2008103658A (ja) 2006-10-18 2007-02-26 薄膜トランジスタ基板の製造方法
EP07016072A EP1914802A2 (en) 2006-10-18 2007-08-16 Method of producing thin film transistor substrate
TW096131096A TW200820446A (en) 2006-10-18 2007-08-22 Method of producing thin film transistor substrate
US11/874,098 US20080093334A1 (en) 2006-10-18 2007-10-17 Method of producing thin film transistor substrate
CNA2007101671041A CN101165882A (zh) 2006-10-18 2007-10-18 制造薄膜晶体管基板的方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020060101428A KR20080035150A (ko) 2006-10-18 2006-10-18 박막 트랜지스터 기판의 제조 방법

Publications (1)

Publication Number Publication Date
KR20080035150A true KR20080035150A (ko) 2008-04-23

Family

ID=38941885

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020060101428A Withdrawn KR20080035150A (ko) 2006-10-18 2006-10-18 박막 트랜지스터 기판의 제조 방법

Country Status (6)

Country Link
US (1) US20080093334A1 (enExample)
EP (1) EP1914802A2 (enExample)
JP (1) JP2008103658A (enExample)
KR (1) KR20080035150A (enExample)
CN (1) CN101165882A (enExample)
TW (1) TW200820446A (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8476123B2 (en) 2010-07-30 2013-07-02 Samsung Display Co., Ltd. Method for manufacturing thin film transistor array panel
KR20130110916A (ko) * 2012-03-30 2013-10-10 삼성디스플레이 주식회사 박막 트랜지스터 표시판 제조 방법

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8202360B2 (en) 2008-09-02 2012-06-19 National Institute Of Advanced Industrial Science And Technology Method of producing amorphous aluminum silicate, amorphous aluminum silicate obtained with said method, and adsorbent using the same
JP5836846B2 (ja) * 2011-03-11 2015-12-24 株式会社半導体エネルギー研究所 液晶表示装置の作製方法
CN107895713B (zh) * 2017-11-30 2020-05-05 深圳市华星光电半导体显示技术有限公司 Tft基板制作方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3191745B2 (ja) * 1997-04-23 2001-07-23 日本電気株式会社 薄膜トランジスタ素子及びその製造方法
US7479205B2 (en) * 2000-09-22 2009-01-20 Dainippon Screen Mfg. Co., Ltd. Substrate processing apparatus
US8148895B2 (en) * 2004-10-01 2012-04-03 Semiconductor Energy Laboratory Co., Ltd. Display device and manufacturing method of the same
KR100614323B1 (ko) * 2004-12-30 2006-08-21 엘지.필립스 엘시디 주식회사 액정표시장치 및 그 제조방법

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8476123B2 (en) 2010-07-30 2013-07-02 Samsung Display Co., Ltd. Method for manufacturing thin film transistor array panel
KR20130110916A (ko) * 2012-03-30 2013-10-10 삼성디스플레이 주식회사 박막 트랜지스터 표시판 제조 방법

Also Published As

Publication number Publication date
CN101165882A (zh) 2008-04-23
US20080093334A1 (en) 2008-04-24
TW200820446A (en) 2008-05-01
EP1914802A2 (en) 2008-04-23
JP2008103658A (ja) 2008-05-01

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PA0109 Patent application

Patent event code: PA01091R01D

Comment text: Patent Application

Patent event date: 20061018

PG1501 Laying open of application
PC1203 Withdrawal of no request for examination
WITN Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid