KR20070120896A - 배선 기판의 제조 방법 - Google Patents

배선 기판의 제조 방법 Download PDF

Info

Publication number
KR20070120896A
KR20070120896A KR1020070059921A KR20070059921A KR20070120896A KR 20070120896 A KR20070120896 A KR 20070120896A KR 1020070059921 A KR1020070059921 A KR 1020070059921A KR 20070059921 A KR20070059921 A KR 20070059921A KR 20070120896 A KR20070120896 A KR 20070120896A
Authority
KR
South Korea
Prior art keywords
flip chip
pad
metal surface
substrate
solder powder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
KR1020070059921A
Other languages
English (en)
Korean (ko)
Inventor
요코 나카바야시
Original Assignee
신꼬오덴기 고교 가부시키가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 신꼬오덴기 고교 가부시키가이샤 filed Critical 신꼬오덴기 고교 가부시키가이샤
Publication of KR20070120896A publication Critical patent/KR20070120896A/ko
Withdrawn legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3465—Application of solder
    • H05K3/3485—Application of solder paste, slurry or powder
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0388—Other aspects of conductors
    • H05K2201/0391—Using different types of conductors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/04—Soldering or other types of metallurgic bonding
    • H05K2203/0425—Solder powder or solder coated metal powder
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/12—Using specific substances
    • H05K2203/122—Organic non-polymeric compounds, e.g. oil, wax or thiol
    • H05K2203/124—Heterocyclic organic compounds, e.g. azole, furan
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/24—Reinforcing of the conductive pattern
    • H05K3/243—Reinforcing of the conductive pattern characterised by selective plating, e.g. for finish plating of pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/951—Materials of bond pads
    • H10W72/952—Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49139—Assembling to base an electrical component, e.g., capacitor, etc. by inserting component lead or terminal into base aperture
    • Y10T29/4914—Assembling to base an electrical component, e.g., capacitor, etc. by inserting component lead or terminal into base aperture with deforming of lead or terminal
    • Y10T29/49142—Assembling to base an electrical component, e.g., capacitor, etc. by inserting component lead or terminal into base aperture with deforming of lead or terminal including metal fusion
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49144—Assembling to base an electrical component, e.g., capacitor, etc. by metal fusion
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49405—Valve or choke making

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
KR1020070059921A 2006-06-20 2007-06-19 배선 기판의 제조 방법 Withdrawn KR20070120896A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JPJP-P-2006-00169981 2006-06-20
JP2006169981A JP4839138B2 (ja) 2006-06-20 2006-06-20 配線基板の製造方法

Publications (1)

Publication Number Publication Date
KR20070120896A true KR20070120896A (ko) 2007-12-26

Family

ID=38862088

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020070059921A Withdrawn KR20070120896A (ko) 2006-06-20 2007-06-19 배선 기판의 제조 방법

Country Status (4)

Country Link
US (1) US7642130B2 (https=)
JP (1) JP4839138B2 (https=)
KR (1) KR20070120896A (https=)
TW (1) TW200802658A (https=)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4576270B2 (ja) * 2005-03-29 2010-11-04 昭和電工株式会社 ハンダ回路基板の製造方法
WO2007007865A1 (en) * 2005-07-11 2007-01-18 Showa Denko K.K. Method for attachment of solder powder to electronic circuit board and solder-attached electronic circuit board
WO2007029866A1 (en) * 2005-09-09 2007-03-15 Showa Denko K.K. Method for attachment of solder powder to electronic circuit board and soldered electronic circuit board
JP2013004738A (ja) 2011-06-16 2013-01-07 Shinko Electric Ind Co Ltd 配線基板の製造方法
US8618647B2 (en) 2011-08-01 2013-12-31 Tessera, Inc. Packaged microelectronic elements having blind vias for heat dissipation
TWI557855B (zh) * 2011-12-30 2016-11-11 旭德科技股份有限公司 封裝載板及其製作方法
US10886250B2 (en) 2015-07-10 2021-01-05 Invensas Corporation Structures and methods for low temperature bonding using nanoparticles
TWI822659B (zh) 2016-10-27 2023-11-21 美商艾德亞半導體科技有限責任公司 用於低溫接合的結構和方法
CN116848631A (zh) 2020-12-30 2023-10-03 美商艾德亚半导体接合科技有限公司 具有导电特征的结构及其形成方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2681738B2 (ja) * 1993-05-12 1997-11-26 昭和電工株式会社 連続的はんだ回路形成法
JP3536954B2 (ja) * 1995-04-14 2004-06-14 富士写真フイルム株式会社 ハロゲン化銀乳剤
US5736074A (en) * 1995-06-30 1998-04-07 Micro Fab Technologies, Inc. Manufacture of coated spheres
TW453137B (en) * 1997-08-25 2001-09-01 Showa Denko Kk Electrode structure of silicon semiconductor device and the manufacturing method of silicon device using it
JP3678048B2 (ja) * 1999-04-05 2005-08-03 松下電器産業株式会社 半田プリコート方法および半田プリコート基板
AU2003256837A1 (en) * 2002-07-26 2004-02-16 Muna Ahmed Abu-Dalo Removing metals from solution using metal binding compounds and sorbents therefor
JP4006409B2 (ja) 2004-03-17 2007-11-14 新光電気工業株式会社 配線基板の製造方法
JP4421367B2 (ja) * 2004-04-23 2010-02-24 日本高純度化学株式会社 置換型無電解金めっき液

Also Published As

Publication number Publication date
JP4839138B2 (ja) 2011-12-21
JP2008004602A (ja) 2008-01-10
US7642130B2 (en) 2010-01-05
US20070292988A1 (en) 2007-12-20
TW200802658A (en) 2008-01-01

Similar Documents

Publication Publication Date Title
KR20070120896A (ko) 배선 기판의 제조 방법
KR100381302B1 (ko) 반도체 장치 및 그 제조방법
JP2949490B2 (ja) 半導体パッケージの製造方法
US6066551A (en) Method for forming bump of semiconductor device
US20060065978A1 (en) Semiconductor element and a producing method for the same, and a semiconductor device and a producing method for the same
US20080257595A1 (en) Packaging substrate and method for manufacturing the same
JPH1012765A (ja) 半導体パッケージ及び製造方法
JP2009010073A (ja) 半導体パッケージおよびこれを用いた半導体装置
US20050054187A1 (en) Method for forming ball pads of BGA substrate
KR20130129292A (ko) 반도체 소자 탑재용 패키지 기판의 제조 방법, 반도체 소자 탑재용 패키지 기판 및 반도체 패키지
KR100722645B1 (ko) 반도체 패키지용 인쇄회로기판 및 그 제조방법
KR20080111397A (ko) 전자 장치의 제조 방법 및 전자 장치
JP2000195984A (ja) 半導体装置用キャリア基板及びその製造方法及び半導体装置及びその製造方法
JP5297083B2 (ja) はんだバンプ形成方法
US20060255102A1 (en) Technique for defining a wettable solder joint area for an electronic assembly substrate
KR101771815B1 (ko) 금속 연결 구조 및 그 제조 방법
JP2001060760A (ja) 回路電極およびその形成方法
WO2004056162A1 (ja) フリップチップ実装用電子部品及びその製造法、回路板及びその製造法、実装体の製造法
KR100660889B1 (ko) 반도체 패키지의 위스커 결함을 억제하는 인쇄회로기판 및이를 이용한 반도체 패키지 탑재방법
JP7382170B2 (ja) 半導体装置
JP3114926B2 (ja) 配線基板のメッキ用マスキング方法
US7160796B2 (en) Method for manufacturing wiring board and semiconductor device
JP3041290B1 (ja) テープ形チップサイズパッケージの製造方法
JP2013004738A (ja) 配線基板の製造方法
US6420207B1 (en) Semiconductor package and enhanced FBG manufacturing

Legal Events

Date Code Title Description
PA0109 Patent application

St.27 status event code: A-0-1-A10-A12-nap-PA0109

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

PC1203 Withdrawal of no request for examination

St.27 status event code: N-1-6-B10-B12-nap-PC1203

WITN Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid
P22-X000 Classification modified

St.27 status event code: A-2-2-P10-P22-nap-X000