KR20070085369A - 반도체 조립 및 테스트 시설용 다이-레벨 추적 메커니즘 - Google Patents

반도체 조립 및 테스트 시설용 다이-레벨 추적 메커니즘 Download PDF

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Publication number
KR20070085369A
KR20070085369A KR1020077011038A KR20077011038A KR20070085369A KR 20070085369 A KR20070085369 A KR 20070085369A KR 1020077011038 A KR1020077011038 A KR 1020077011038A KR 20077011038 A KR20077011038 A KR 20077011038A KR 20070085369 A KR20070085369 A KR 20070085369A
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South Korea
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die
strings
source object
units
string
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English (en)
Korean (ko)
Inventor
호르네 룽 코흐
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어플라이드 머티어리얼스, 인코포레이티드
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Publication of KR20070085369A publication Critical patent/KR20070085369A/ko
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06Q—INFORMATION AND COMMUNICATION TECHNOLOGY [ICT] SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES; SYSTEMS OR METHODS SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES, NOT OTHERWISE PROVIDED FOR
    • G06Q10/00—Administration; Management
    • G06Q10/06—Resources, workflows, human or project management; Enterprise or organisation planning; Enterprise or organisation modelling
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06Q—INFORMATION AND COMMUNICATION TECHNOLOGY [ICT] SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES; SYSTEMS OR METHODS SPECIALLY ADAPTED FOR ADMINISTRATIVE, COMMERCIAL, FINANCIAL, MANAGERIAL OR SUPERVISORY PURPOSES, NOT OTHERWISE PROVIDED FOR
    • G06Q10/00—Administration; Management
    • G06Q10/08—Logistics, e.g. warehousing, loading or distribution; Inventory or stock management
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof

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  • Engineering & Computer Science (AREA)
  • Business, Economics & Management (AREA)
  • Economics (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Strategic Management (AREA)
  • Human Resources & Organizations (AREA)
  • Entrepreneurship & Innovation (AREA)
  • General Business, Economics & Management (AREA)
  • Quality & Reliability (AREA)
  • Theoretical Computer Science (AREA)
  • Tourism & Hospitality (AREA)
  • Development Economics (AREA)
  • Marketing (AREA)
  • Operations Research (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Educational Administration (AREA)
  • Game Theory and Decision Science (AREA)
  • General Factory Administration (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
KR1020077011038A 2004-10-15 2005-10-12 반도체 조립 및 테스트 시설용 다이-레벨 추적 메커니즘 Withdrawn KR20070085369A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US61880504P 2004-10-15 2004-10-15
US60/618,805 2004-10-15

Publications (1)

Publication Number Publication Date
KR20070085369A true KR20070085369A (ko) 2007-08-27

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KR1020077011038A Withdrawn KR20070085369A (ko) 2004-10-15 2005-10-12 반도체 조립 및 테스트 시설용 다이-레벨 추적 메커니즘

Country Status (7)

Country Link
US (2) US7343214B2 (enExample)
EP (1) EP1810326A1 (enExample)
JP (1) JP2008517465A (enExample)
KR (1) KR20070085369A (enExample)
CN (1) CN101040290A (enExample)
TW (1) TW200629026A (enExample)
WO (1) WO2006044399A1 (enExample)

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US9559113B2 (en) 2014-05-01 2017-01-31 Macronix International Co., Ltd. SSL/GSL gate oxide in 3D vertical channel NAND
KR20160018227A (ko) * 2014-08-08 2016-02-17 에스케이하이닉스 주식회사 웨이퍼 처리 시스템 및 이를 이용한 웨이퍼 처리 방법
US10419410B2 (en) * 2016-12-15 2019-09-17 Seagate Technology Llc Automatic generation of unique identifiers for distributed directory management users
KR102653937B1 (ko) 2018-07-17 2024-04-02 삼성전자주식회사 반도체 장치의 테스트 방법및 반도체 장치의 테스트 시스템
US11063000B2 (en) * 2019-01-29 2021-07-13 Infineon Technologies Ag Semiconductor package authentication feature
US11450616B2 (en) 2020-07-29 2022-09-20 Nxp Usa, Inc. Using a backside mask layer for forming a unique die mark identifier pattern

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Also Published As

Publication number Publication date
TW200629026A (en) 2006-08-16
US20080071413A1 (en) 2008-03-20
US20060085089A1 (en) 2006-04-20
CN101040290A (zh) 2007-09-19
US7343214B2 (en) 2008-03-11
WO2006044399A1 (en) 2006-04-27
EP1810326A1 (en) 2007-07-25
JP2008517465A (ja) 2008-05-22

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Date Code Title Description
PA0105 International application

Patent event date: 20070515

Patent event code: PA01051R01D

Comment text: International Patent Application

PG1501 Laying open of application
PC1203 Withdrawal of no request for examination
WITN Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid