KR20060123144A - 포토레지스트 스트립 동안의 배리어 재료의 손실 최소화 - Google Patents

포토레지스트 스트립 동안의 배리어 재료의 손실 최소화 Download PDF

Info

Publication number
KR20060123144A
KR20060123144A KR1020067009102A KR20067009102A KR20060123144A KR 20060123144 A KR20060123144 A KR 20060123144A KR 1020067009102 A KR1020067009102 A KR 1020067009102A KR 20067009102 A KR20067009102 A KR 20067009102A KR 20060123144 A KR20060123144 A KR 20060123144A
Authority
KR
South Korea
Prior art keywords
layer
silicon
photoresist
gas mixture
dielectric
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
KR1020067009102A
Other languages
English (en)
Korean (ko)
Inventor
라오 아나프라가다
헬렌 주
Original Assignee
램 리써치 코포레이션
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 램 리써치 코포레이션 filed Critical 램 리써치 코포레이션
Publication of KR20060123144A publication Critical patent/KR20060123144A/ko
Withdrawn legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • H10P50/20Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/24Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials
    • H10P50/242Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials of Group IV materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/071Manufacture or treatment of dielectric parts thereof
    • H10W20/081Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H10W20/084Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts for dual-damascene structures
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • H10P50/20Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/286Dry etching; Plasma etching; Reactive-ion etching of insulating materials of organic materials
    • H10P50/287Dry etching; Plasma etching; Reactive-ion etching of insulating materials of organic materials by chemical means
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00Etching of wafers, substrates or parts of devices
    • H10P50/73Etching of wafers, substrates or parts of devices using masks for insulating materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00Interconnections in chips, wafers or substrates
    • H10W20/01Manufacture or treatment
    • H10W20/071Manufacture or treatment of dielectric parts thereof
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/26Processing photosensitive materials; Apparatus therefor
    • G03F7/42Stripping or agents therefor
    • G03F7/427Stripping or agents therefor using plasma means only
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P80/00Climate change mitigation technologies for sector-wide applications
    • Y02P80/30Reducing waste in manufacturing processes; Calculations of released waste quantities

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Drying Of Semiconductors (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
KR1020067009102A 2003-11-12 2004-11-09 포토레지스트 스트립 동안의 배리어 재료의 손실 최소화 Withdrawn KR20060123144A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/712,326 2003-11-12
US10/712,326 US20050101135A1 (en) 2003-11-12 2003-11-12 Minimizing the loss of barrier materials during photoresist stripping

Publications (1)

Publication Number Publication Date
KR20060123144A true KR20060123144A (ko) 2006-12-01

Family

ID=34552671

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020067009102A Withdrawn KR20060123144A (ko) 2003-11-12 2004-11-09 포토레지스트 스트립 동안의 배리어 재료의 손실 최소화

Country Status (8)

Country Link
US (1) US20050101135A1 (https=)
EP (1) EP1683192A1 (https=)
JP (1) JP2007511099A (https=)
KR (1) KR20060123144A (https=)
CN (1) CN1868039A (https=)
IL (1) IL174648A0 (https=)
TW (1) TW200524051A (https=)
WO (1) WO2005048335A1 (https=)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7517801B1 (en) * 2003-12-23 2009-04-14 Lam Research Corporation Method for selectivity control in a plasma processing system
US8222155B2 (en) * 2004-06-29 2012-07-17 Lam Research Corporation Selectivity control in a plasma processing system
US7396769B2 (en) * 2004-08-02 2008-07-08 Lam Research Corporation Method for stripping photoresist from etched wafer
US7479457B2 (en) * 2005-09-08 2009-01-20 Lam Research Corporation Gas mixture for removing photoresist and post etch residue from low-k dielectric material and method of use thereof
JP2007180420A (ja) * 2005-12-28 2007-07-12 Fujitsu Ltd 半導体装置の製造方法及び磁気ヘッドの製造方法
US7244313B1 (en) * 2006-03-24 2007-07-17 Applied Materials, Inc. Plasma etch and photoresist strip process with intervening chamber de-fluorination and wafer de-fluorination steps
US7932181B2 (en) * 2006-06-20 2011-04-26 Lam Research Corporation Edge gas injection for critical dimension uniformity improvement
WO2009039551A1 (en) * 2007-09-26 2009-04-02 Silverbrook Research Pty Ltd Method of removing photoresist
US20090078675A1 (en) * 2007-09-26 2009-03-26 Silverbrook Research Pty Ltd Method of removing photoresist
JP5532826B2 (ja) * 2009-11-04 2014-06-25 富士通セミコンダクター株式会社 半導体素子の製造方法
CN102877041B (zh) * 2011-07-14 2014-11-19 中国科学院微电子研究所 薄膜沉积方法以及半导体器件制造方法
CN102610511A (zh) * 2012-03-21 2012-07-25 中微半导体设备(上海)有限公司 光刻胶的去除方法
US8901007B2 (en) * 2013-01-03 2014-12-02 Taiwan Semiconductor Manufacturing Co., Ltd. Addition of carboxyl groups plasma during etching for interconnect reliability enhancement
US10354860B2 (en) * 2015-01-29 2019-07-16 Versum Materials Us, Llc Method and precursors for manufacturing 3D devices
JP6523091B2 (ja) 2015-07-24 2019-05-29 株式会社Kokusai Electric 半導体装置の製造方法、基板処理装置およびプログラム

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09330911A (ja) * 1996-06-11 1997-12-22 Toshiba Corp 半導体装置の製造方法
US6455232B1 (en) * 1998-04-14 2002-09-24 Applied Materials, Inc. Method of reducing stop layer loss in a photoresist stripping process using a fluorine scavenger
JP3803523B2 (ja) * 1999-12-28 2006-08-02 株式会社東芝 ドライエッチング方法及び半導体装置の製造方法
US6372636B1 (en) * 2000-06-05 2002-04-16 Chartered Semiconductor Manufacturing Ltd. Composite silicon-metal nitride barrier to prevent formation of metal fluorides in copper damascene
US6352921B1 (en) * 2000-07-19 2002-03-05 Chartered Semiconductor Manufacturing Ltd. Use of boron carbide as an etch-stop and barrier layer for copper dual damascene metallization
US6479391B2 (en) * 2000-12-22 2002-11-12 Intel Corporation Method for making a dual damascene interconnect using a multilayer hard mask
US6647994B1 (en) * 2002-01-02 2003-11-18 Taiwan Semiconductor Manufacturing Company Method of resist stripping over low-k dielectric material
JP4326746B2 (ja) * 2002-01-07 2009-09-09 東京エレクトロン株式会社 プラズマ処理方法

Also Published As

Publication number Publication date
JP2007511099A (ja) 2007-04-26
CN1868039A (zh) 2006-11-22
IL174648A0 (en) 2006-08-20
EP1683192A1 (en) 2006-07-26
WO2005048335A1 (en) 2005-05-26
TW200524051A (en) 2005-07-16
US20050101135A1 (en) 2005-05-12

Similar Documents

Publication Publication Date Title
US6168726B1 (en) Etching an oxidized organo-silane film
KR100896160B1 (ko) 실리콘 카바이드 플라즈마 식각 방법
US6211092B1 (en) Counterbore dielectric plasma etch process particularly useful for dual damascene
US6284149B1 (en) High-density plasma etching of carbon-based low-k materials in a integrated circuit
KR100849707B1 (ko) 탄소-도우핑된 저유전체들의 선택적 식각
US6670278B2 (en) Method of plasma etching of silicon carbide
US7129171B2 (en) Selective oxygen-free etching process for barrier materials
US6777344B2 (en) Post-etch photoresist strip with O2 and NH3 for organosilicate glass low-K dielectric etch applications
CN101124661A (zh) 碳氟化合物蚀刻化学剂中使用氢气添加剂的掺碳的硅氧化物蚀刻
KR20030024717A (ko) 유기실리케이트 유전층을 포함하는 반도체 웨이퍼에서에칭 후에 수소로 포토레지스트를 박리하는 방법
KR20060123144A (ko) 포토레지스트 스트립 동안의 배리어 재료의 손실 최소화
US20060011579A1 (en) Gas compositions
US6647994B1 (en) Method of resist stripping over low-k dielectric material
US7202177B2 (en) Nitrous oxide stripping process for organosilicate glass
US6916697B2 (en) Etch back process using nitrous oxide
CN1967777A (zh) 使导体露出的刻蚀方法

Legal Events

Date Code Title Description
PA0105 International application

St.27 status event code: A-0-1-A10-A15-nap-PA0105

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

G170 Re-publication after modification of scope of protection [patent]
PG1701 Publication of correction

St.27 status event code: A-3-3-P10-P19-oth-PG1701

Patent document republication publication date: 20090609

Republication note text: Request for Correction Notice (Document Request)

Gazette number: 1020060123144

Gazette reference publication date: 20061201

PC1203 Withdrawal of no request for examination

St.27 status event code: N-1-6-B10-B12-nap-PC1203

WITN Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid
P22-X000 Classification modified

St.27 status event code: A-2-2-P10-P22-nap-X000