KR20040002214A - Forming method for storage node of semiconductor device - Google Patents

Abstract

PURPOSE: A method for forming a storage node of a semiconductor device is provided to prevent a bridge between storage nodes even after hemispherical silicon is formed on the storage node by additionally forming a nitride layer for increasing the interval between the storage nodes after a core insulation layer is formed. CONSTITUTION: A lower insulation layer including a storage node contact plug(53) is formed on a semiconductor substrate(41) including a predetermined underlying structure. The core insulation layer(57) and a thin film for a hard mask are sequentially formed on the resultant structure. The hard mask thin film and the core insulation layer are etched to form a trench exposing the storage node contact plug by a photolithography process using a storage node mask wherein a predetermined thickness of the lower insulation layer and the storage node contact plug is eliminated by over-etch. A conductive layer for the storage node(65) and a sacrificial insulation layer are formed on the resultant structure. The sacrificial insulation layer is blanket-etched to form the storage node wherein the storage node is over-etched to have a height lower than that of the hard mask. The sacrificial insulation layer is removed. The hemispherical silicon(67) is formed on the storage node.

Description

Forming method for storage node of semiconductor device

The present invention relates to a method of forming a storage electrode of a semiconductor device, and more particularly, to a method of forming a storage electrode of a semiconductor device for improving insulating properties between storage electrodes when forming hemispherical silicon to increase the surface area of the storage electrode.

The recent trend of high integration of semiconductor devices has been greatly influenced by the development of fine pattern formation technology, and the miniaturization of photoresist patterns, which are widely used as masks such as etching or ion implantation processes, are essential in the manufacturing process of semiconductor devices.

The resolution R of the photoresist pattern is proportional to the wavelength λ of the light source of the reduction exposure apparatus and the process variable k, and inversely proportional to the lens aperture (NA, numerical aperture) of the exposure apparatus.

[R = k * λ / NA, R = resolution, λ = wavelength of light source, NA = number of apertures]

Here, the wavelength of the light source is reduced in order to improve the optical resolution of the reduced exposure apparatus. For example, the G-line and i-line reduced exposure apparatus having wavelengths of 436 and 365 nm have a process resolution of about 0.7 and 0.5, respectively. In order to form a fine pattern of 0.5 μm or less, the micrometer has a limit of about μm, and an exposure apparatus using an ultraviolet ray having a small wavelength, for example, a KrF laser having a wavelength of 248 nm or an ArF laser having a wavelength of 193 nm, is used as a light source, or a process As a method of imaging, a method of using a phase inversion mask as an exposure mask and a method of forming a separate thin film on the wafer which can improve image contrast can be used. Tri-layer resist (hereinafter referred to as TLR) method in which an intermediate layer such as spin on glass (SOG) is interposed between two photoresist layers or silicon on the photoresist layer. It has been developed, such as silico-migration method for injection may lower the resolution limit.

In addition, the contact hole connecting the upper and lower conductive wirings is reduced in size as the device is integrated, and the distance between the wiring and the peripheral wiring is reduced, and the aspect ratio, which is the ratio of the diameter and the depth of the contact hole, is increased. Therefore, in a highly integrated semiconductor device having multiple conductive wirings, accurate and tight alignment between masks in a manufacturing process is required to form a contact, thereby reducing process margin.

Hereinafter, a method of forming a storage electrode of a semiconductor device according to the related art will be described with reference to the accompanying drawings.

1A to 1E are cross-sectional views illustrating a method of forming a storage electrode of a semiconductor device according to the prior art.

First, an element isolation insulating film (not shown) defining an active region is formed on the semiconductor substrate 11.

Next, a gate insulating film (not shown) is formed on the semiconductor substrate 11, and a transistor including a gate electrode (not shown) and a source / drain junction region is formed, and then the first interlayer insulating film 13 is formed on the entire surface. To form.

Next, a contact hole (not shown) is formed by a photolithography process using a contact mask that exposes a predetermined portion of the bit line contact and the storage electrode contact on the entire surface, and then the landing plug 15 filling the contact hole. To form.

Next, a second interlayer insulating film 17 is formed over the entire surface.

Next, the second interlayer insulating layer 17 is etched by a photolithography process using a bit line contact mask to form a bit line contact hole (not shown).

Next, a bit line contact plug (not shown) is formed to be connected to the landing plug 15 through the bit line contact hole.

A bit line 19 is then formed which is connected to the bit line contact plug. In this case, a mask insulating film pattern is provided on the bit line 19, and an insulating film spacer is provided on the sidewall.

Next, a stacked structure of the third interlayer insulating film 21, the etch stop film 25, and the fourth interlayer insulating film 26 is formed on the entire surface. In this case, the etch stop layer 25 is formed of a nitride film, the third interlayer insulating film 21 and the fourth interlayer insulating film 26 is formed of an oxide film.

Next, the stack structure is etched by a photolithography process using a storage electrode contact mask to form a storage electrode contact hole (not shown) that exposes the landing plug 15.

Next, a storage electrode contact plug 23 connected to the landing plug 15 is formed through the storage electrode contact hole.

Next, a core insulating film 27 is formed over the entire surface. In this case, the core insulating layer 27 is formed of an oxide film.

Next, a photoresist layer 29 is coated on the core insulation layer 27. (See Figure 1A)

Next, the photoresist layer 29 is exposed and developed by a photolithography process using a storage electrode mask to form a photoresist pattern 32.

Thereafter, the core insulation layer 27 is etched using the photoresist pattern 32 as an etch mask to form a trench 31 exposing the storage electrode contact plug 23. In this case, the fourth interlayer insulating layer 26, the etch stop layer 25, the third interlayer insulating layer 21, and the storage electrode contact plug 23 having a predetermined thickness are etched by the transient etching during the etching process. (See FIG. 1B)

Next, the photoresist pattern 32 is removed.

Next, a conductive layer 33 for a storage electrode is formed on the entire surface to have a predetermined thickness. In this case, the storage electrode conductive layer 33 is formed of a polysilicon layer.

Next, a sacrificial insulating film 35 is formed over the entire surface. In this case, the sacrificial insulating layer 35 is formed of a material having excellent fluidity, such as an SOG film, and is formed so that the trench 31 is completely filled.

Next, the sacrificial insulating layer 35 is etched entirely to expose the storage layer conductive layer 33. (See Figure 1C)

Next, the exposed storage electrode conductive layer 33 is etched to form a cylindrical storage electrode 36.

Next, the sacrificial insulating layer 35 in the storage electrode 36 is removed to expose the surface of the storage electrode 36.

Next, hemispherical silicon 37 is grown on the storage electrode 36. (See FIG. 1D)

Next, a dielectric film 38 and a plate electrode conductive layer 39 are formed over the entire surface. In this case, the plate electrode conductive layer 39 is formed of a polycrystalline silicon layer. (See Figure 1E)

Subsequently, the plate electrode conductive layer 39 and the dielectric layer 38 are etched by a photolithography process using a plate electrode mask to complete the capacitor.

As described above, the method of forming a storage electrode of a semiconductor device according to the related art is, in the case where hemispherical silicon is formed in order to increase the surface area of the storage electrode as the semiconductor device becomes more integrated and the gap between the devices becomes narrower. As such, a bridge is generated between the storage electrodes, thereby lowering insulation characteristics between devices, thereby reducing reliability and yield of devices.

In order to solve the above problems of the prior art, a bridge between storage electrodes is formed even after forming a core insulating film and further forming a nitride film to increase the distance between the storage electrodes, even after forming hemispherical silicon on the surface of the storage electrode. SUMMARY OF THE INVENTION An object of the present invention is to provide a method of forming a storage electrode of a semiconductor device by preventing occurrence of the same, improving insulation characteristics between the storage electrodes, and thus improving integration of the semiconductor device.

1A to 1E are cross-sectional views illustrating a method of forming a storage electrode of a semiconductor device according to the related art.

Figure 2 is a photograph showing that a bridge between the storage electrodes formed by the prior art.

3A to 3E are cross-sectional views illustrating a method of forming a storage electrode of a semiconductor device according to the present invention.

<Description of Symbols for Major Parts of Drawings>

11, 41: semiconductor substrate 13, 43: first interlayer insulating film

15, 45: landing plug 17, 47: second interlayer insulating film

19, 49: bit lines 21, 51: third interlayer insulating film

23, 53: storage electrode contact plug 25, 56: fourth interlayer insulating film

26, 55: etching prevention film 27, 57: core insulating film

29: photosensitive film 31, 63: trench

32, 61: photoresist pattern 33: conductive layer for storage electrode

35: sacrificial insulating film 36, 65: storage electrode

37, 67: hemispherical silicon 38, 69: dielectric film

39, 71: conductive layer for plate electrodes 59: thin film for hard mask

60: thin film pattern for hard mask

Method for forming a storage electrode of a semiconductor device according to the present invention for achieving the above object,

Forming a lower insulating layer having a storage electrode contact plug on the semiconductor substrate having a predetermined lower structure;

Sequentially forming a core insulating film and a hard mask thin film on the entire surface;

A trench is formed to expose the storage electrode contact plug by etching the hard mask thin film and the core insulation layer by a photolithography process using a storage electrode mask, but performing the over etching to remove the lower insulating layer and the storage electrode contact plug having a predetermined thickness. Process to do,

Forming a conductive layer for a storage electrode and a sacrificial insulating film on the entire surface thereof;

Exposing the sacrificial insulating layer to the entire surface to expose the storage electrode conductive layer and the hard mask thin film, and performing the over etching to remove the lower insulating layer and the storage electrode contact plug having a predetermined thickness;

Forming a storage electrode by etching the conductive layer for the storage electrode on the entire surface, and performing the overetching to form the storage electrode at a height lower than that of the hard mask thin film;

Removing the sacrificial insulating film;

Forming hemispherical silicon on the surface of the storage electrode;

The hard mask thin film may be formed of a nitride film.

Hereinafter, a method of forming a storage electrode of a semiconductor device according to the related art will be described with reference to the accompanying drawings.

3A to 3E are cross-sectional views illustrating a method of forming a storage electrode of a semiconductor device according to the present invention.

First, an element isolation insulating film (not shown) defining an active region is formed on the semiconductor substrate 41.

Next, a gate insulating film (not shown) is formed on the semiconductor substrate 41, and a transistor including a gate electrode (not shown) and a source / drain junction region is formed, and then the first interlayer insulating film 43 is formed on the entire surface. To form.

Next, a contact plug (not shown) is formed by a photolithography process using a contact mask that exposes a portion intended as a bit line contact and a storage electrode contact on the entire surface, and then the landing plug 45 filling the contact hole. To form.

Next, a second interlayer insulating film 47 is formed over the entire surface.

Next, the second interlayer insulating layer 47 is etched by a photolithography process using a bit line contact mask to form a bit line contact hole (not shown).

Next, a bit line contact plug (not shown) connected to the landing plug 45 is formed through the bit line contact hole.

A bit line 49 is then formed to be connected to the bit line contact plug. A mask insulating film pattern is provided on the bit line 49 and an insulating film spacer is provided on the side wall.

Next, a stacked structure of a third interlayer insulating film 51, an etch stop film 55, and a fourth interlayer insulating film 56 is formed on the entire surface. In this case, the etch stop film 55 is formed of a nitride film, and the third interlayer insulating film 51 and the fourth interlayer insulating film 56 are formed of an oxide film.

Next, the stack structure is etched by a photolithography process using a storage electrode contact mask to form a storage electrode contact hole (not shown) that exposes the landing plug 45.

Next, a storage electrode contact plug 53 connected to the landing plug 45 is formed through the storage electrode contact hole.

Next, a core insulating film 57 is formed over the entire surface. In this case, the core insulating layer 57 is formed of an oxide film.

Next, a thin film 59 for a hard mask is formed on the core insulating layer 57 at a predetermined thickness.

In this case, the hard mask thin film 59 is formed of a nitride film to increase the distance between the storage electrodes in a subsequent process. The hard mask thin film 59 is formed to be thicker than the etch stop layer 55 so that a predetermined thickness remains after the trench is formed in a subsequent process.

Thereafter, a photoresist pattern 61 is formed on the hard mask thin film 59 to expose a portion to be a storage electrode. (See Figure 3A)

Next, the hard mask thin film 59 is etched using the photoresist pattern 61 as an etch mask to form a hard mask thin film pattern 59.

Next, the photoresist pattern 61 is removed.

Thereafter, the core insulating layer 57 is etched using the hard mask thin film pattern 59 as an etch mask to form a trench 63 exposing the storage electrode contact plug 53. In this case, the etching process may be performed by excessive etching to etch the fourth interlayer insulating layer 56, the etch stop layer 55, the third interlayer insulating layer 51, and the storage electrode contact plug 53 having a predetermined thickness. (See Figure 3b)

Next, a conductive layer (not shown) for a storage electrode is formed on the entire surface to have a predetermined thickness. In this case, the storage electrode conductive layer is formed of a polycrystalline silicon layer.

Next, a sacrificial insulating film (not shown) is formed over the entire surface. In this case, the sacrificial insulating film is formed of a material having excellent fluidity, such as an SOG film, and is formed so that the trench 63 is completely buried.

Next, the sacrificial insulating layer is etched entirely to expose the conductive layer for the storage electrode. In this case, the etching process is performed by the excessive etching so that the sacrificial insulating layer is formed lower than the thin film pattern 60 for the hard mask.

Next, a cylindrical storage electrode 65 is formed by etching the exposed conductive layer for the storage electrode on the entire surface, and the etching process is performed by a transient etching process so that the storage electrode 65 is the thin film pattern 60 for the hard mask. To form lower than).

Next, the sacrificial insulating film in the storage electrode 65 is removed to expose the surface of the storage electrode 65. (See Figure 3c)

Next, hemispherical silicon 67 is grown on the surface of the storage electrode 65. At this time, the hard mask thin film pattern 60 is formed between the storage electrodes 65 so that a certain distance is maintained between the storage electrodes 65 so that even if the hemispherical silicon 67 is formed, a bridge between the storage electrodes 65 is formed. There is no fear of causing. (See FIG. 3D)

Next, a dielectric film 69 and a plate electrode conductive layer 71 are formed over the entire surface. In this case, the plate electrode conductive layer 71 is formed of a polysilicon layer. (See Figure 3E)

Subsequently, the plate electrode conductive layer 71 and the dielectric layer 69 are etched by a photolithography process using a plate electrode mask to complete the capacitor.

As described above, in the method of forming the storage electrode of the semiconductor device according to the present invention, after the core insulating film is formed, the nitride film is additionally formed to increase the distance between the storage electrodes, thereby storing the semi-spherical silicon on the surface of the storage electrode. By preventing bridges from occurring between the electrodes, the insulating properties between the storage electrodes can be improved, thereby increasing the integration of semiconductor devices.

Claims (2)

Forming a lower insulating layer having a storage electrode contact plug on the semiconductor substrate having a predetermined lower structure; Sequentially forming a core insulating film and a hard mask thin film on the entire surface; A trench is formed to expose the storage electrode contact plug by etching the hard mask thin film and the core insulation layer by a photolithography process using a storage electrode mask, but performing the over etching to remove the lower insulating layer and the storage electrode contact plug having a predetermined thickness. Process to do, Forming a conductive layer for a storage electrode and a sacrificial insulating film over the entire surface thereof Exposing the sacrificial insulating layer to the entire surface to expose the storage electrode conductive layer and the hard mask thin film, and performing the over etching to remove the lower insulating layer and the storage electrode contact plug having a predetermined thickness; Forming a storage electrode by etching the conductive layer for the storage electrode on the entire surface, and performing the overetching to form the storage electrode at a height lower than that of the hard mask thin film; Removing the sacrificial insulating film; And forming a hemispherical silicon on the surface of the storage electrode. The method of claim 1, The hard mask thin film is a storage electrode forming method of a semiconductor device, characterized in that formed of a nitride film.