KR20020052225A - 반도체 캐리어용 필름의 제조방법 - Google Patents
반도체 캐리어용 필름의 제조방법 Download PDFInfo
- Publication number
- KR20020052225A KR20020052225A KR1020010054419A KR20010054419A KR20020052225A KR 20020052225 A KR20020052225 A KR 20020052225A KR 1020010054419 A KR1020010054419 A KR 1020010054419A KR 20010054419 A KR20010054419 A KR 20010054419A KR 20020052225 A KR20020052225 A KR 20020052225A
- Authority
- KR
- South Korea
- Prior art keywords
- copper foil
- thickness
- film
- manufacturing
- base material
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1345—Conductors connecting electrodes to cell terminals
- G02F1/13452—Conductors connecting driver circuitry and terminals of panels
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/4985—Flexible insulating substrates
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- General Physics & Mathematics (AREA)
- Wire Bonding (AREA)
- Optics & Photonics (AREA)
- Crystallography & Structural Chemistry (AREA)
- Chemical & Material Sciences (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Mathematical Physics (AREA)
Abstract
Description
(단위;㎛) | ||||
횟수 | 전방(P1) | 중앙(P2) | 후방(P3) | |
1 | 9.0 | 9.0 | 9.0 | |
2 | 9.0 | 9.0 | 9.0 | |
3 | 9.0 | 9.0 | 9.0 | |
4 | 8.5 | 8.5 | 8.5 | |
5 | 8.5 | 8.5 | 8.5 | |
6 | 8.5 | 8.5 | 8.5 | |
7 | 8.5 | 8.5 | 8.5 | |
8 | 9.0 | 9.0 | 8.5 | |
9 | 9.0 | 9.0 | 8.5 | |
10 | 9.0 | 9.0 | 9.0 | |
최대값 | 9.0 | 9.0 | 9.0 | |
최소값 | 8.5 | 8.5 | 8.5 | |
최대값-최소값 | 0.5 | 0.5 | 0.5 | |
평균값 | 8.80 | 8.80 | 8.70 |
(단위;㎛) | ||||
횟수 | 전방(P1) | 중앙(P2) | 후방(P3) | |
1 | 5.5 | 5.5 | 5.5 | |
2 | 5.5 | 5.5 | 5.5 | |
3 | 5.5 | 5.5 | 5.5 | |
4 | 5.5 | 5.5 | 5.5 | |
5 | 5.5 | 5.5 | 5.5 | |
6 | 5.5 | 5.5 | 5.5 | |
7 | 5.5 | 5.5 | 5.5 | |
8 | 5.5 | 5.5 | 5.5 | |
9 | 6.0 | 5.5 | 5.5 | |
10 | 6.0 | 6.0 | 6.0 | |
최대값 | 6.0 | 6.0 | 6.0 | |
최소값 | 5.5 | 5.5 | 5.5 | |
최대값-최소값 | 0.5 | 0.5 | 0.5 | |
평균값 | 5.6 | 5.6 | 5.5 |
Claims (2)
- 두께 12㎛이상의 동박과 폴리이미드계 필름으로 이루어지는 기재를 사용하며, 상기 동박을 5∼9㎛의 두께로 에칭하는 것을 특징으로 하는 반도체 캐리어용 필름의 제조방법.
- 제 1 항에 있어서, 상기 에칭된 동박의 두께의 차가 평균값에 대하여 ±0.5㎛이내인 것을 특징으로 하는 반도체 캐리어용 필름의 제조방법.
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JPJP-P-2000-00392702 | 2000-12-25 | ||
JP2000392702A JP2002198399A (ja) | 2000-12-25 | 2000-12-25 | 半導体キャリア用フィルムの製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20020052225A true KR20020052225A (ko) | 2002-07-03 |
KR100606882B1 KR100606882B1 (ko) | 2006-07-31 |
Family
ID=18858649
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1020010054419A KR100606882B1 (ko) | 2000-12-25 | 2001-09-05 | 반도체 캐리어용 필름의 제조방법 |
Country Status (3)
Country | Link |
---|---|
JP (1) | JP2002198399A (ko) |
KR (1) | KR100606882B1 (ko) |
TW (1) | TW512468B (ko) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7743494B2 (en) * | 2008-01-11 | 2010-06-29 | Ppg Industries Ohio, Inc. | Process of fabricating a circuit board |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0766933B2 (ja) * | 1991-09-18 | 1995-07-19 | 三井金属鉱業株式会社 | Tabテープの製造方法 |
JP3356568B2 (ja) * | 1994-11-30 | 2002-12-16 | 鐘淵化学工業株式会社 | 新規なフレキシブル銅張積層板 |
JPH10195668A (ja) * | 1996-12-28 | 1998-07-28 | Sumitomo Metal Mining Co Ltd | 2層フレキシブル基板の製造方法 |
JP2000208879A (ja) * | 1999-01-08 | 2000-07-28 | Sumitomo Electric Ind Ltd | フレキシブルプリント配線板およびその製造方法 |
-
2000
- 2000-12-25 JP JP2000392702A patent/JP2002198399A/ja active Pending
-
2001
- 2001-09-05 KR KR1020010054419A patent/KR100606882B1/ko active IP Right Grant
- 2001-10-16 TW TW090125534A patent/TW512468B/zh not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
JP2002198399A (ja) | 2002-07-12 |
TW512468B (en) | 2002-12-01 |
KR100606882B1 (ko) | 2006-07-31 |
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