KR20020002992A - 박막 트랜지스터의 액정표시소자 제조방법 - Google Patents
박막 트랜지스터의 액정표시소자 제조방법 Download PDFInfo
- Publication number
- KR20020002992A KR20020002992A KR1020000037373A KR20000037373A KR20020002992A KR 20020002992 A KR20020002992 A KR 20020002992A KR 1020000037373 A KR1020000037373 A KR 1020000037373A KR 20000037373 A KR20000037373 A KR 20000037373A KR 20020002992 A KR20020002992 A KR 20020002992A
- Authority
- KR
- South Korea
- Prior art keywords
- amorphous silicon
- film
- silicon film
- doped amorphous
- tft
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 16
- 239000010409 thin film Substances 0.000 title claims abstract description 15
- 238000000034 method Methods 0.000 title claims description 21
- 239000013078 crystal Substances 0.000 title 1
- 239000010408 film Substances 0.000 claims abstract description 102
- 229910021417 amorphous silicon Inorganic materials 0.000 claims abstract description 48
- 239000000758 substrate Substances 0.000 claims abstract description 21
- 239000002184 metal Substances 0.000 claims abstract description 13
- 239000004973 liquid crystal related substance Substances 0.000 claims abstract description 10
- 239000011521 glass Substances 0.000 claims abstract description 9
- 238000005530 etching Methods 0.000 claims abstract description 8
- 238000009832 plasma treatment Methods 0.000 claims description 19
- 230000001681 protective effect Effects 0.000 claims description 13
- 230000015572 biosynthetic process Effects 0.000 claims description 12
- 238000000151 deposition Methods 0.000 claims description 12
- 230000004888 barrier function Effects 0.000 claims description 7
- 229920002120 photoresistant polymer Polymers 0.000 claims description 7
- 230000008021 deposition Effects 0.000 claims description 4
- 238000000059 patterning Methods 0.000 claims description 2
- 238000002161 passivation Methods 0.000 abstract description 2
- 238000000206 photolithography Methods 0.000 abstract 1
- 238000004381 surface treatment Methods 0.000 description 3
- 238000009125 cardiac resynchronization therapy Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/13439—Electrodes characterised by their electrical, optical, physical properties; materials therefor; method of making
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
- H01L21/76855—After-treatment introducing at least one additional element into the layer
- H01L21/76856—After-treatment introducing at least one additional element into the layer by treatment in plasmas or gaseous environments, e.g. nitriding a refractory metal liner
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Nonlinear Science (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Optics & Photonics (AREA)
- Ceramic Engineering (AREA)
- Crystallography & Structural Chemistry (AREA)
- Chemical & Material Sciences (AREA)
- Mathematical Physics (AREA)
- Plasma & Fusion (AREA)
- Manufacturing & Machinery (AREA)
- Thin Film Transistor (AREA)
Abstract
Description
Claims (7)
- 유리기판 상부에 게이트 전극을 형성하는 단계;상기 게이트 전극을 덮는 게이트 절연막을 증착하는 단계;게이트 절연막 상부에 액티브 형성영역을 위한 절연막, 비도핑된 비정질 실리콘막과 도핑된 비정질 실리콘막을 차례로 증착하는 단계;TFT 형성영역에 감광막 패턴을 형성하고, 그 패턴을 식각 장벽으로 하여 도핑된 비정질 실리콘막, 비도핑된 비정질 실리콘막과 절연막을 차례로 식각하는 단계;상기 결과물 전면에 소오스/드레인 금속막을 증착하고, 패터닝하여 소오스/드레인 전극을 형성하는 단계;H2 플라즈마 처리에 의해 표면 처리 및 도핑된 비정질 실리콘막을 제거하고, 연속적으로, TFT 보호를 위한 보호막을 증착하는 단계; 및ITO 공정을 통해 드레인 전극과 콘택되는 화소전극을 형성함으로써, TFT 기판을 완성하는 단계를 포함하여 구성하는 것을 특징으로 하는 박막 트랜지스터의 액정표시소자 제조방법.
- 제 1항에 있어서, 상기 도핑된 비정질 실리콘막은 바람직하게 박막의 50 ~ 100Å 두께로 형성되는 것을 특징으로 하는 박막 트랜지스터의 액정표시소자 제조방법.
- 제 1항에 있어서, 상기 비도핑된 비정질 실리콘막은 바람직하게 500 ~ 1000Å 두께로 형성되는 것을 특징으로 하는 박막 트랜지스터의 액정표시소자 제조방법.
- 제 1항에 있어서, 상기 H2 플라즈마 처리는 보호막 증착 장치안에서 진행되며, 연속적으로 보호막을 증착하여 백 채널을 대기중에 노출시키지 않는 것을 특징으로 하는 박막 트랜지스터의 액정표시소자의 제조방법.
- 제 1항에 있어서, 상기 H2 플라즈마 처리는 바람직하게 100Å 두께의 도핑된 비정질 실리콘막을 식각하여 백 채널을 형성하는 것을 특징으로 하는 박막 트랜지스터의 액정표시소자의 제조방법.
- 제 1항에 있어서, 상기 H2 플라즈마 처리는 0.5W/Cm2 이상의 파워 인가 및 60 ~ 300초의 시간동안 플라즈마 처리를 수행하는 것을 특징으로 하는 박막 트랜지스터의 액정표시소자의 제조방법.
- 제 1항에 있어서, 상기 H2 개스 뿐만아니라 SF6, He, O2 또는 Ar 등의 단일 또는 혼합개스를 이용할 수 있는 것을 특징으로 하는 박막 트랜지스터의 액정표시소자의 제조방법.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020000037373A KR100658064B1 (ko) | 2000-06-30 | 2000-06-30 | 박막 트랜지스터의 액정표시소자 제조방법 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020000037373A KR100658064B1 (ko) | 2000-06-30 | 2000-06-30 | 박막 트랜지스터의 액정표시소자 제조방법 |
Publications (2)
Publication Number | Publication Date |
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KR20020002992A true KR20020002992A (ko) | 2002-01-10 |
KR100658064B1 KR100658064B1 (ko) | 2006-12-18 |
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KR1020000037373A KR100658064B1 (ko) | 2000-06-30 | 2000-06-30 | 박막 트랜지스터의 액정표시소자 제조방법 |
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KR (1) | KR100658064B1 (ko) |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11274504A (ja) * | 1998-03-20 | 1999-10-08 | Advanced Display Inc | Tftおよびその製法 |
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- 2000-06-30 KR KR1020000037373A patent/KR100658064B1/ko active IP Right Grant
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KR100658064B1 (ko) | 2006-12-18 |
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