KR20010068379A - Capacitor forming method of semiconductor device - Google Patents

Abstract

PURPOSE: A method for forming a capacitor of a semiconductor device is provided to enlarge the surface area of an electrode of a capacitor without changing the height and the size of the capacitor. CONSTITUTION: The method includes eight processes. In the first process, the first inter-layer insulating film(22) is formed on the upper of a semiconductor substrate(21) on which a device is formed. A poly-plug(23) is formed so as to connect to a specific part of the device and then a second inter-layer insulating film(24) and a conductive material are sequentially deposited on the entire surface thereof. The conductive material is patterned, thereby forming a bit line(25). The third inter-layer insulating film(26) is deposited on the entire surface of the upper of the resultant. In the second process, a nitride film(27), a first oxide film and a photosensitive film are sequentially formed on the upper of the third inter-layer insulating film, patterned so as to fit to the position of the poly-plug and then the first oxide film is etched by a dry etch. In the third process, a predetermined portion of the first oxide film from the side surface is removed by etching the first oxide film with an isotropic etch and a contact hole is formed by etching the nitride film, the third inter-layer insulating film and the second inter-layer insulating film with an anisotropic etch using the photosensitive film as a mask so that the poly-plug is exposed. In the fourth process, the photosensitive film is removed and a first poly-silicon(29) is formed on the upper entire surface of the resultant formed in the third step and then etched back. In the fifth process, a second oxide film is formed on the upper entire surface of the resultant and the second oxide film is patterned so that the second oxide film remains on a part of the center of a contact formed of the first poly-silicon and then a second poly-silicon(31) is formed on the upper of a resultant formed by the patterning. In the sixth process, the second poly-silicon is etched back so that the second oxide film is exposed and a third oxide film is formed on the upper entire surface of a resultant formed by the etch back and then etched back so that the second oxide film is exposed. In the seventh process, a third poly-silicon(33) is formed on the upper entire surface of a resultant formed in the sixth step and etched back so that the second oxide film is exposed. In the eighth process, the remaining first through third oxide films are removed by a wet etch and then a dielectric film(34) is formed on the upper entire surface of a resultant formed by the removing process and a fourth poly-silicon(35) is formed on the upper entire surface of the resultant.

Description

CAPACCITOR FORMING METHOD OF SEMICONDUCTOR DEVICE

The present invention relates to a method for forming a capacitor of a semiconductor device, and more particularly, to a method for forming a capacitor of a semiconductor device, which is suitable for increasing the density while increasing the capacity by increasing the surface area of the capacitor lower electrode.

An embodiment of a method of forming a conventional semiconductor device capacitor will be described below with reference to the procedure cross-sectional view of FIGS. 1A to 1E.

First, as shown in FIG. 1A, a first interlayer insulating film 2 is deposited on a semiconductor substrate 1 on which an element is formed, and a poly plug 3 is formed to be connected to a specific portion of the element. A second interlayer insulating film 4 and a conductive film are sequentially deposited, and the conductive film is patterned to form a bit line 5, and then a third interlayer insulating film 6 is deposited on the upper surface of the structure.

Next, as shown in FIG. 1B, a contact hole is formed by etching the third interlayer insulating film 6 and the second interlayer insulating film 4 so as to be connected to a region where the poly plug 3 is formed. After forming the node contact 7 by filling it with a nitride film 8 is deposited on the upper surface.

In this case, the nitride layer 8 is used as an etch stop layer to protect the lower layer in a subsequent wet etching process.

Next, as shown in FIG. 1C, the oxide film 9 is formed high on the nitride film 8, and the oxide film 9 and the nitride film 8 are sequentially formed so that the node contact 7 is exposed to the position where the capacitor is to be formed. After etching) to form a first polysilicon 10 on the upper surface of the structure formed.

Next, as shown in FIG. 1D, the spin-on glass 11 is formed high on the upper surface of the formed structure, and the first polysilicon is exposed after etching back to expose the first polysilicon 10. Etch (10).

At this time, the upper portion of the first polysilicon 10 is removed and remains on the side surface of the oxide film 9 in the form of a sidewall, which becomes a capacitor lower electrode.

Next, as shown in FIG. 1E, the remaining spin-on glass 11 and the oxide film 9 are removed by wet etching, and the upper surfaces of the first polysilicon 10 and the nitride film 8 exposed through the above process are removed. The dielectric film 12 is formed on the top surface, and the second polysilicon 13 is formed on the upper surface thereof.

At this time, the second polysilicon 13 becomes a capacitor upper electrode, and is formed as a single layer on all capacitor lower electrodes in the memory device, and is connected to a low potential.

In the conventional method of forming a capacitor of a semiconductor device as described above, the height of the capacitor is increased to increase the capacitor capacity, so that patterning becomes difficult, the margin of the photoresist film that can withstand deep etching is reduced, and the contact between the bit line and the upper electrode is formed. Not only is it difficult to reduce the size, there was a problem that the capacity is reduced to increase the density.

The present invention has been made to solve the conventional problems as described above, the object of the present invention is to perform a simple process by repeating the surface area of the capacitor electrode can be enlarged without changing the height and size of the capacitor The present invention provides a method for forming a capacitor of a semiconductor device.

1 is a cross-sectional view showing a method of forming a capacitor of a conventional semiconductor device.

Figure 2 is a cross-sectional view of the procedure of an embodiment of the present invention.

*** Explanation of symbols for main parts of drawing ***

21 semiconductor substrate 22 first interlayer insulating film

23 poly plug 24 second interlayer insulating film

25 bit line 26 third interlayer insulating film

27: nitride film 28: first oxide film

29: first polysilicon 30: second oxide film

31: second polysilicon 32: third oxide film

33: third polysilicon 34: dielectric film

35: fourth polysilicon

A capacitor forming method of a semiconductor device for achieving the object of the present invention as described above is to deposit a first interlayer insulating film on the semiconductor substrate on which the device is formed and to form a poly plug to be connected to a specific portion of the device, the upper front surface A first step of depositing a second interlayer insulating film and a conductive material in order, patterning the conductive material to form a bit line, and then depositing a third interlayer insulating film on the upper surface of the structure; A second process of forming a nitride film, a first oxide film, and a photoresist film on top of the third interlayer insulating film and patterning the photoresist to a position of the polyplug, followed by dry etching the first oxide film using the patterned photoresist as a mask; Isotropically etching the first oxide film to remove a predetermined portion from the side surface, and anisotropically etching the nitride film, the third interlayer insulating film, and the second interlayer insulating film so that the poly plug is exposed using a photosensitive film as a mask. 3 step; A fourth step of removing the photoresist film, forming a first polysilicon on the upper surface of the formed structure, and then etching back; A fifth process of forming a second oxide film on the upper surface of the formed structure, patterning the second oxide film to remain only in a central portion of the contact formed of the first polysilicon, and then forming second polysilicon on the formed structure; A sixth step of etching back the formed second polysilicon so that a second oxide film is exposed, and forming a third oxide film on the entire upper surface of the structure and then etching back so that the second oxide film is exposed; A seventh step of forming a third polysilicon on the upper surface of the formed structure and etching back to expose the second oxide film; The wetted etching of the remaining first oxide film, the second oxide film, and the third oxide film is removed and a dielectric film is formed on the upper surface of the structure formed through the above process, and the fourth polysilicon is formed on the upper surface. Characterized in that made.

A method of forming a capacitor of a semiconductor device according to the present invention as described above will be described in detail with reference to a cross-sectional view of the procedure shown in FIGS. 2A to 2H as an embodiment.

First, as shown in FIG. 2A, a first interlayer insulating layer 22 is deposited on the semiconductor substrate 21 on which the device is formed, and a polyplug 23 is formed to be connected to a specific portion of the device. The second interlayer dielectric layer 24 and the conductive material are sequentially deposited, and the conductive material is patterned to form the bit line 25, and then the third interlayer dielectric layer 26 is deposited on the upper surface of the structure.

Next, as shown in FIG. 2B, a nitride film 27, a first oxide film 28, and a photoresist film PR2 are sequentially formed on the third interlayer insulating film 26, and then the position of the polyplug 23 is formed. After the patterning is performed, the first oxide layer 28 is dry-etched using the patterned photoresist PR2 as a mask.

Next, as shown in FIG. 2C, the first oxide layer 28 is isotropically etched to remove the first portion 28 from the side surface, and the poly plug 23 is exposed using the photoresist layer PR2 as a mask. The nitride film 27, the third interlayer insulating film 26, and the second interlayer insulating film 24 are anisotropically etched to form contact holes.

At this time, the side surface of the exposed first oxide film 28 is etched when the first oxide film 28 is isotropically etched. In a subsequent process, the size and shape of the capacitor lower electrode is changed to match the pattern of the first oxide film 28. Since the etching amount is determined according to the size of the capacitor lower electrode to be formed.

Next, as shown in FIG. 2D, the photoresist film PR2 is removed, and first polysilicon 29 is formed on the upper surface of the formed structure, and then etched back.

An upper portion of the first polysilicon 29 becomes a lower portion of the lower electrode of the capacitor, and a lower portion thereof is connected to the polyplug 23 to become a storage node contact.

Next, as shown in FIG. 2E, a second oxide film 30 is formed on the upper surface of the formed structure, and patterned so as to remain only in a central portion of the contact formed of the first polysilicon 29. The second polysilicon 31 is formed on the structure.

At this time, the cylinder shape of the capacitor lower electrode is determined according to the pattern of the second oxide film 30 to be formed, and the size of the innermost cylinder is determined by the first pattern.

Next, as shown in FIG. 2F, the formed second polysilicon 31 is etched back so that the second oxide film 30 is exposed, and after the third oxide film 32 is formed on the upper surface of the structure, It is etched back so that the oxide film 30 may be revealed.

In this case, the third oxide film 32 serves to define a spaced area between the internal cylinder of the capacitor lower electrode formed of the second polysilicon 31 and the subsequent cylinder to be formed in a subsequent process.

Next, as illustrated in FIG. 2G, a third polysilicon 33 is formed on the upper surface of the formed structure and etched back so that the second oxide layer 30 is exposed.

At this time, as described above, the outer cylinder of the capacitor lower electrode is formed by the third polysilicon 33 to form a capacitor lower electrode having a double cylinder.

In addition, if the second polysilicon 31 is formed inward and the process of forming the third polysilicon 33 is repeated, the capacitor lower electrode having two or more cylinders may be formed. Capacities can be increased in size capacitors.

Next, as shown in FIG. 2H, the remaining first oxide film 28, the second oxide film 30, and the third oxide film 32 are removed by wet etching, and then the dielectric film is formed on the upper surface of the structure formed through the process. 34 is formed, and the fourth polysilicon 35 is formed on the upper front surface thereof.

In this case, the fourth polysilicon 35 becomes a capacitor upper electrode, and is formed as a single layer on all capacitor lower electrodes in the memory device and is connected to a low potential.

The capacitor forming method of the semiconductor device of the present invention as described above is to perform a simple process repeatedly to form a capacitor lower electrode having a multi-cylinder to enlarge the surface area of the capacitor electrode without changing the height and size of the capacitor It can work.

Claims (2)

A first interlayer dielectric film is deposited on the semiconductor substrate on which the device is formed, and a polyplug is formed so as to be connected to a specific portion of the device. Then, a second interlayer dielectric film and a conductive material are sequentially deposited on the upper surface thereof, and the conductive material is patterned. Forming a bit line, and then depositing a third interlayer dielectric layer on the upper surface of the structure; A second process of forming a nitride film, a first oxide film, and a photoresist film on top of the third interlayer insulating film and patterning the photoresist to a position of the polyplug, followed by dry etching the first oxide film using the patterned photoresist as a mask; Isotropically etching the first oxide film to remove a predetermined portion from the side surface, and anisotropically etching the nitride film, the third interlayer insulating film, and the second interlayer insulating film so that the poly plug is exposed using a photosensitive film as a mask. 3 step; A fourth step of removing the photoresist film, forming a first polysilicon on the upper surface of the formed structure, and then etching back; A fifth process of forming a second oxide film on the upper surface of the formed structure, patterning the second oxide film to remain only in a central portion of the contact formed of the first polysilicon, and then forming second polysilicon on the formed structure; A sixth step of etching back the formed second polysilicon so that a second oxide film is exposed, and forming a third oxide film on the entire upper surface of the structure and then etching back so that the second oxide film is exposed; A seventh step of forming a third polysilicon on the upper surface of the formed structure and etching back to expose the second oxide film; The wetted etching of the remaining first oxide film, the second oxide film, and the third oxide film is removed and a dielectric film is formed on the upper surface of the structure formed through the above process, and the fourth polysilicon is formed on the upper surface. A method of forming a capacitor of a semiconductor device, characterized in that made. 4. The method of claim 1, wherein the capacitor lower electrode having a plurality of cylinders is formed by repeating the fifth to seventh steps.