KR20040059932A - Method for improving leaning when cylinder type DRAM capacitor is formed - Google Patents

Abstract

PURPOSE: A method is provided to improve capacitance and stability by improving leaning when forming a DRAM capacitor of a cylindrical structure. CONSTITUTION: An etch stop layer(2) and a capacitor oxide layer(3) are sequentially formed on a substrate with a storage node plug(1). A capacitor hole is formed to expose the storage node plug by selectively etching the capacitor oxide layer. A polysilicon layer(4) is deposited on the resultant structure. A buffer oxide layer(5) is then filled in the capacitor hole. The buffer oxide layer and the polysilicon layer are polished by CMP. A support substance, such as photoresist is formed on the resultant structure. By patterning the support substance to line shape according to the minor axis of capacitor, a support pattern(7) is formed. The capacitor oxide layer and the buffer oxide layer are performed by dip-out. The support pattern is removed.

Description

Method for improving leaning when cylinder type DRAM capacitor is formed}

The present invention relates to a method for manufacturing a DRAM capacitor, and more particularly, to a technology capable of improving capacitor lining occurring when a capacitor having a cylindrical structure is formed.

In the case of a capacitor of a conventional DRAM device, it can be classified into a cylinder type and a concave type. The cylinder type is advantageous because it can use a larger capacitor surface area at the same cell size than the concave type. However, the cylinder type is less stable than the concave in terms of leaching. In particular, as the size of the device continues to decrease, the size of the capacitor also decreases, making it difficult to satisfy more than 25 fF, which is a capacitor capacity required by a device per cell. In addition, compensating only by increasing the height as the size decreases is difficult when etching the storage node. For this reason, a cylinder structure that can use a large structural area is preferred, but the existing method has the weakest problem in terms of lining.

A capacitor forming process of a cylinder structure according to the prior art is briefly illustrated in FIGS. 1A to 1C.

As shown in FIG. 1A, after the general process is completed and the process of forming the storage node contact plug 1 is completed, the nitride etch stop layer 2 is formed, and the oxide film 3 for capacitor formation is formed to a predetermined thickness thereon. do. Subsequently, the capacitor oxide layer 3 and the nitride layer etch stop layer 2 are etched to form a predetermined pattern for forming the capacitor storage node.

Subsequently, as shown in FIG. 1B, polysilicon 4 is deposited on the entire surface of the substrate including the capacitor oxide film pattern, and then polished by CMP to separate polysilicon per cell.

Next, as shown in FIG. 1C, the capacitor oxide film is removed by a wet method to form a capacitor storage node having a cylinder structure made of polysilicon.

It is known that lining occurs due to surface tension between capacitors when the capacitor oxide film is removed by the wet method. Factors affecting lining include the minimum distance between capacitors (c), capacitor bottom CD (b), capacitor height (a), thickness of polysilicon and capacitor structure. As the device gets smaller, the minimum distance, bottom CD, capacitor height, and thickness of the polysilicon decrease in proportion to the size of the device. As a result, future devices will be more vulnerable in terms of lining.

An object of the present invention is to provide a method for improving a capacitor lining phenomenon occurring in a dip-out process of a capacitor forming oxide film when forming a capacitor of a cylinder structure.

Figure 1a to 1c is a process flow diagram showing a capacitor formation process of the cylinder structure according to the prior art.

2A to 2D are a plan view and a cross-sectional view showing a method of improving lining phenomenon when forming a DRAM capacitor of a cylinder structure according to the present invention.

* Explanation of symbols for main parts of the drawings

1: storage node plug 2: etch stop layer

3: capacitor oxide film 4: polysilicon

5: buffer oxide film 7: support material layer pattern

In order to achieve the above object, a method of improving a lining phenomenon in forming a DRAM capacitor of a cylinder structure according to the present invention includes sequentially forming an etch stop layer and a capacitor forming oxide film on a semiconductor substrate on which a predetermined structure is formed, and the capacitor oxide film and etching. Forming a predetermined pattern for forming a capacitor having a cylindrical structure by etching the stop layer, depositing polysilicon on the entire surface of the substrate including the pattern, and depositing a buffer oxide film on the entire surface of the substrate so as to fill the pattern for forming the capacitor. Depositing, polishing the buffer oxide film and the polysilicon by CMP so as to be separated for each capacitor, forming a predetermined support material layer on a substrate, and patterning the substrate in a line shape along a capacitor short axis direction; Wet-out the oxide film and the buffer oxide film in a wet manner; It characterized by comprising the step of supporting group removing material pattern.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention. do.

The present invention provides a cell miniblock in a capacitor short direction (ie, a direction in which a lining occurs) by using a photoresist in order to improve a lining phenomenon occurring when a wet deep out of a capacitor oxide film formed after polysilicon CMP when forming a DRAM capacitor having a cylinder structure. Line patterning is performed to penetrate the cell mini block to serve as a support between capacitors during deep out.

2A to 2D briefly illustrate a method of improving a lining phenomenon in forming a DRAM capacitor of a cylinder structure according to the present invention. In each figure, the left side is shown in plan view, and the right side is shown in cross section.

First, referring to FIG. 2A, after the general DRAM capacitor forming process is completed and the process of forming the storage node contact plug 1 is completed, the nitride etch stop layer 2 is formed, and the capacitor forming oxide film 3 is formed thereon. It is formed to a predetermined thickness. Subsequently, the capacitor oxide layer 3 and the nitride layer etch stop layer 2 are etched to form a predetermined pattern for forming a capacitor storage node having a cylinder structure. After depositing polysilicon (4) on the front surface of the substrate including the capacitor oxide film pattern, and then depositing a buffer oxide film (5) on the front surface of the substrate, the buffer oxide film (5) and polysilicon (4) to separate the polysilicon for each capacitor Is polished by CMP. The reason for forming the buffer oxide film 5 is to prevent the capacitor support material (photoresist or nitride film) to be formed in a later process from entering the capacitor. PE-TEOS, PSG, BPSG, HDP oxide, LP-TEOS, SOG, etc. may be used as the buffer oxide film.

Subsequently, as shown in FIG. 2B, the photoresist 7 is applied on the substrate with a thickness of 0.1 µm to 3.0 µm, and then patterned in a line form along the short axis direction of the capacitor as shown in the plan view through photolithography.

Next, as shown in FIG. 2C, the capacitor oxide film and the buffer oxide film are wetted out, and then, as shown in FIG. 2D, the photoresist is stripped by O ₂ plasma to form a capacitor storage node 4 made of polysilicon. do. After the photoresist is removed, dry cleaning is performed.

Instead of the photoresist, the nitride film may be thinly deposited to a thickness of about 100 kPa to about 3000 kPa, and may be used by patterning it in a line shape as described above. In addition to the nitride film, polysilicon, W, TiN, Ti, Al, Ru, WSix, and the like may be used to form a line-shaped support pattern.

As described above, after forming the line-type photoresist pattern or the nitride film pattern along the short axis direction of the capacitor where the lining occurs, the oxide film is removed and the line pattern acts as a supporter. Capacitor lining can be prevented.

Although the technical idea of the present invention has been described in detail according to the above preferred embodiment, it should be noted that the above-described embodiment is for the purpose of description and not of limitation. In addition, those skilled in the art will understand that various embodiments are possible within the scope of the technical idea of the present invention.

According to the present invention, it is possible to improve the capacitor lining phenomenon occurring during the oxide film dip-out during the capacitor formation process of the cylinder structure, to ensure stable capacitor capacity, and contribute to the reliability and yield of device operation.

Claims (7)

Sequentially forming an etch stop layer and an oxide film for forming a capacitor on a semiconductor substrate on which a predetermined structure is formed; Etching the capacitor oxide layer and the etch stop layer to form a predetermined pattern for forming a capacitor having a cylinder structure; Depositing polysilicon on the entire surface of the substrate including the pattern; Depositing a buffer oxide film on the entire surface of the substrate to fill the patterns for forming the capacitors; Polishing the buffer oxide film and polysilicon by CMP so as to be separated for each capacitor; Forming a predetermined support material layer on the substrate and patterning the substrate in a line shape along a capacitor short axis direction; Dipping out the capacitor oxide film and the buffer oxide film in a wet manner; And Removing the support material pattern The improvement phenomenon of the lining phenomenon when forming a DRAM capacitor of a cylinder structure comprising a. The method of claim 1, PE-TEOS, PSG, BPSG, HDP oxide film, LP-TEOS or SOG as the buffer oxide film, the lining phenomenon improvement method when forming a DRAM capacitor of the cylindrical structure. The method of claim 1, The method of improving the phenomenon of forming a DRAM capacitor of a cylindrical structure, wherein the support material layer is formed by applying a photoresist. The method of claim 3, The method of improving the phenomenon of lining when forming a DRAM capacitor of the cylindrical structure, characterized in that the photoresist is applied to a thickness of 0.1 ~ 3.0㎛. The method of claim 1, The method of improving the phenomenon of forming a DRAM capacitor having a cylindrical structure, wherein the support material layer is formed of a nitride film. The method of claim 5, And a thinning film having a thickness of about 100 to 3000 mW. The method of claim 1, And forming the support material layer using one of polysilicon, W, TiN, Ti, Al, Ru, and WSix.