KR19990063179A - 그래픽프로세서 및 데이타처리시스템 - Google Patents

그래픽프로세서 및 데이타처리시스템 Download PDF

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Publication number
KR19990063179A
KR19990063179A KR1019980055956A KR19980055956A KR19990063179A KR 19990063179 A KR19990063179 A KR 19990063179A KR 1019980055956 A KR1019980055956 A KR 1019980055956A KR 19980055956 A KR19980055956 A KR 19980055956A KR 19990063179 A KR19990063179 A KR 19990063179A
Authority
KR
South Korea
Prior art keywords
pixel data
command
memory
data
display
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
KR1019980055956A
Other languages
English (en)
Korean (ko)
Inventor
아츠시 나카무라
야스히로 나카츠카
가즈시게 야마기시
Original Assignee
가나이 쓰도무
가부시끼가이샤 히다치세이사꾸쇼
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 가나이 쓰도무, 가부시끼가이샤 히다치세이사꾸쇼 filed Critical 가나이 쓰도무
Publication of KR19990063179A publication Critical patent/KR19990063179A/ko
Withdrawn legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T15/00Three-dimensional [3D] image rendering
    • G06T15/005General purpose rendering architectures
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/363Graphics controllers
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2340/00Aspects of display data processing
    • G09G2340/10Mixing of images, i.e. displayed pixel being the result of an operation, e.g. adding, on the corresponding input pixels
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39Control of the bit-mapped memory
    • G09G5/393Arrangements for updating the contents of the bit-mapped memory
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39Control of the bit-mapped memory
    • G09G5/399Control of the bit-mapped memory using two or more bit-mapped memories, the operations of which are switched in time, e.g. ping-pong buffers
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00Television systems
    • H04N7/01Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level
    • H04N7/0127Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level by changing the field or frame frequency of the incoming video signal, e.g. frame rate converter
    • H04N7/0132Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level by changing the field or frame frequency of the incoming video signal, e.g. frame rate converter the field or frame frequency of the incoming video signal being multiplied by a positive integer, e.g. for flicker reduction

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Graphics (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Picture Signal Circuits (AREA)
KR1019980055956A 1997-12-22 1998-12-18 그래픽프로세서 및 데이타처리시스템 Withdrawn KR19990063179A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP35254397A JP3681528B2 (ja) 1997-12-22 1997-12-22 グラフィックプロセッサ及びデータ処理システム
JP97-352543 1997-12-22

Publications (1)

Publication Number Publication Date
KR19990063179A true KR19990063179A (ko) 1999-07-26

Family

ID=18424786

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019980055956A Withdrawn KR19990063179A (ko) 1997-12-22 1998-12-18 그래픽프로세서 및 데이타처리시스템

Country Status (4)

Country Link
US (2) US6384831B1 (https=)
JP (1) JP3681528B2 (https=)
KR (1) KR19990063179A (https=)
TW (1) TW428161B (https=)

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US6573905B1 (en) 1999-11-09 2003-06-03 Broadcom Corporation Video and graphics system with parallel processing of graphics windows
US7982740B2 (en) 1998-11-09 2011-07-19 Broadcom Corporation Low resolution graphics mode support using window descriptors
US6768774B1 (en) 1998-11-09 2004-07-27 Broadcom Corporation Video and graphics system with video scaling
US6661422B1 (en) * 1998-11-09 2003-12-09 Broadcom Corporation Video and graphics system with MPEG specific data transfer commands
US6798420B1 (en) 1998-11-09 2004-09-28 Broadcom Corporation Video and graphics system with a single-port RAM
US6853385B1 (en) 1999-11-09 2005-02-08 Broadcom Corporation Video, audio and graphics decode, composite and display system
US6636222B1 (en) * 1999-11-09 2003-10-21 Broadcom Corporation Video and graphics system with an MPEG video decoder for concurrent multi-row decoding
US7446774B1 (en) 1998-11-09 2008-11-04 Broadcom Corporation Video and graphics system with an integrated system bridge controller
DE19934208A1 (de) * 1999-07-21 2001-01-25 Grundig Ag Verfahren und Vorrichtung zur Wiedergabe eines zeilenflimmerreduzierten Graphiksignals auf einem mit Zeilensprungwiedergabe arbeitenden Fernsehdisplay
US6975324B1 (en) 1999-11-09 2005-12-13 Broadcom Corporation Video and graphics system with a video transport processor
US6954195B2 (en) * 2000-03-01 2005-10-11 Minolta Co., Ltd. Liquid crystal display device having a liquid crystal display driven by interlace scanning and/or sequential scanning
JP4029253B2 (ja) * 2000-04-10 2008-01-09 富士フイルム株式会社 画像リサイズ装置及びその方法
US7184059B1 (en) 2000-08-23 2007-02-27 Nintendo Co., Ltd. Graphics system with copy out conversions between embedded frame buffer and main memory
JP2002163671A (ja) * 2000-11-27 2002-06-07 Namco Ltd ゲームシステム、プログラム及び情報記憶媒体
JP2003233366A (ja) * 2002-02-13 2003-08-22 Nec Access Technica Ltd 表示合成回路及び携帯用電子機器
KR100450680B1 (ko) * 2002-07-29 2004-10-01 삼성전자주식회사 버스 대역폭을 증가시키기 위한 메모리 컨트롤러, 이를이용한 데이터 전송방법 및 이를 구비하는 컴퓨터 시스템
WO2004072934A2 (en) * 2003-02-11 2004-08-26 Research In Motion Limited Display processing system and method
CN100390825C (zh) * 2003-06-12 2008-05-28 微软公司 混合多重图象的方法
US8063916B2 (en) 2003-10-22 2011-11-22 Broadcom Corporation Graphics layer reduction for video composition
JP2006013701A (ja) * 2004-06-23 2006-01-12 Seiko Epson Corp 表示コントローラ、電子機器及び画像データ供給方法
US7695365B2 (en) * 2004-09-10 2010-04-13 Wms Gaming Inc. Slot machine with persistent change in symbol function
US8018521B2 (en) * 2005-10-26 2011-09-13 Panasonic Corporation Image reproducing apparatus, image recorder, image reproducing method, image recording method, and semiconductor integrated circuit
JP4723427B2 (ja) * 2006-06-30 2011-07-13 ルネサスエレクトロニクス株式会社 画像処理回路および画像処理システムならびに画像処理方法
WO2010087132A1 (ja) * 2009-01-27 2010-08-05 三菱電機株式会社 状態表示装置及び状態表示装置の表示方法
JP5137866B2 (ja) * 2009-01-28 2013-02-06 三菱電機株式会社 設備操作表示装置
WO2011051756A1 (en) * 2009-11-02 2011-05-05 Freescale Semiconductor, Inc. Pixel data processing apparatus and method of processing pixel data
US8259120B2 (en) 2010-06-02 2012-09-04 Dell Products L.P. Seamless switching between graphics controllers
US12164463B2 (en) * 2022-04-07 2024-12-10 SambaNova Systems, Inc. Buffer splitting

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JPH06309425A (ja) * 1990-10-12 1994-11-04 Internatl Business Mach Corp <Ibm> グラフィックディスプレイ装置及び方法
JPH0646299A (ja) 1992-07-27 1994-02-18 Matsushita Electric Ind Co Ltd 画像表示装置
JPH0683299A (ja) 1992-08-31 1994-03-25 Nec Home Electron Ltd スキャン変換回路
US5481275A (en) * 1992-11-02 1996-01-02 The 3Do Company Resolution enhancement for video display using multi-line interpolation
US6130660A (en) * 1993-10-01 2000-10-10 Maxvision Corporation System and method for synthesizing high resolution video
JPH07274086A (ja) 1994-03-28 1995-10-20 Toshiba Corp 表示制御装置
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JPH07334669A (ja) * 1994-06-07 1995-12-22 Matsushita Electric Ind Co Ltd 図形処理方法および図形処理装置
AU3548095A (en) * 1994-08-31 1996-03-22 S3 Incorporated Apparatus for correction of video tearing
US6014125A (en) * 1994-12-08 2000-01-11 Hyundai Electronics America Image processing apparatus including horizontal and vertical scaling for a computer display
US5657047A (en) * 1995-01-12 1997-08-12 Accelgraphics, Inc. Method and apparatus for zooming images on a video display
JP3075505B2 (ja) 1995-05-10 2000-08-14 インターナショナル・ビジネス・マシーンズ・コーポレ−ション 表示制御装置及びその制御方法
US5943036A (en) * 1995-07-27 1999-08-24 Akio Tanaka Flicker reduction system for computer graphical interlaced display
US5936621A (en) * 1996-06-28 1999-08-10 Innovision Labs System and method for reducing flicker on a display
US5963192A (en) * 1996-10-11 1999-10-05 Silicon Motion, Inc. Apparatus and method for flicker reduction and over/underscan
US5867180A (en) * 1997-03-13 1999-02-02 International Business Machines Corporation Intelligent media memory statically mapped in unified memory architecture
US6229521B1 (en) * 1997-04-10 2001-05-08 Sun Microsystems, Inc. Method for antialiasing fonts for television display
US5963262A (en) * 1997-06-30 1999-10-05 Cirrus Logic, Inc. System and method for scaling images and reducing flicker in interlaced television images converted from non-interlaced computer graphics data
US6061094A (en) * 1997-11-12 2000-05-09 U.S. Philips Corporation Method and apparatus for scaling and reducing flicker with dynamic coefficient weighting
US6130723A (en) * 1998-01-15 2000-10-10 Innovision Corporation Method and system for improving image quality on an interlaced video display
US6034733A (en) * 1998-07-29 2000-03-07 S3 Incorporated Timing and control for deinterlacing and enhancement of non-deterministically arriving interlaced video data

Also Published As

Publication number Publication date
US20020033827A1 (en) 2002-03-21
TW428161B (en) 2001-04-01
US6384831B1 (en) 2002-05-07
JP3681528B2 (ja) 2005-08-10
US6587111B2 (en) 2003-07-01
JPH11184454A (ja) 1999-07-09

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PA0109 Patent application

Patent event code: PA01091R01D

Comment text: Patent Application

Patent event date: 19981218

PG1501 Laying open of application
PC1203 Withdrawal of no request for examination
WITN Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid