KR19980025560A - Manufacturing Method of Semiconductor Device - Google Patents

Abstract

The present invention relates to a method of manufacturing a semiconductor device that can solve the degradation of the electrical characteristics of the gate due to the polymer, step coverage problems, and the like, comprising the steps of sequentially forming an insulating film and a polysilicon film for the gate electrode on the semiconductor substrate; Forming a photoresist pattern on a gate silicon polysilicon film; etching the gate silicon polysilicon film using the photoresist pattern as a mask; and a polymer produced during the etching process of the gate silicon polysilicon film It includes the step of removing using a mixed gas of fluorine-based gas and oxygen gas mixed. By this method, the degradation of the electrical characteristics of the gate electrode layer due to the polymer can be solved, and the step coverage in the subsequent process can be improved.

Description

Manufacturing Method of Semiconductor Device

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to a method for manufacturing a semiconductor device for removing a polymer generated during etching of a polysilicon film for a gate electrode.

1A to 1E sequentially illustrate a method of manufacturing a conventional semiconductor device.

Referring to FIG. 1A, a gate oxide film 12 is formed on a semiconductor substrate 10, and then a polysilicon film 14 for a gate electrode is formed on the gate oxide film 12 as shown in FIG. 1B. do.

In FIG. 1C, the photoresist pattern 16 is formed on the polysilicon layer 14 by defining a region in which the gate electrode layer is to be formed by a photolithography process well known in the art.

Next, when the polysilicon film 14 for the gate electrode is etched using the photoresist pattern 16 as a mask, the polysilicon film 14 under the photoresist pattern 16 is etched as shown in FIG. 1D. All of the polysilicon films 14 exposed on the surface except for the etching are etched.

Finally, when the photoresist pattern 16 is removed by an ashing process and a photoresist strip process, the gate electrode layer of the semiconductor device is formed as shown in FIG. 1E.

In the gate electrode layer forming process step, the reaction mechanism in which the polysilicon is etched in the etching process step of the polysilicon film 14 is as follows.

Gas used for etching polysilicon uses a mixed gas of chlorine (Cl 2) and helium (He). Here helium gas is an inert gas does not directly participate in the reaction, but serves to activate the reaction.

The following is a reaction formula for etching polysilicon with a polysilicon etching gas.

[Formula 1]

Cl2 + e- → 2Cl-

4Cl- + Si → SiCl4

However, the photoresist used as a mask in the polysilicon etching as described above reacts with the etching gas to generate the polymer 18 as shown in FIG. 1D.

The following shows a reaction scheme of the polymer 18 formed during polysilicon etching for the gate electrode.

[Formula 2]

Cl2 + e- → 2Cl-

4Cl- + C → CCl4

CCl4 + 2e- → CCl2-

x (CCl2) → CxCly (polymer)

The polysilicon etching reaction for the gate electrode and the polymer 18 forming reaction continue to occur as long as RF (Radio Frequency) powder and polysilicon etching gas are supplied.

In particular, the photoresist basically includes C, N, O, and H as organic components, of which C reacts with the etching gas to form a polymer 18 called CxCly. Herein, the polymer 18 CxCly may have various compositions depending on x and y.

The polymer 18 formed during the polysilicon etching for the gate electrode has a problem that it is not removed even after the ashing and the photoresist strip performed to remove the photoresist pattern 16, as shown in FIG. 1E.

The polymer 18 not removed as described above, first, during the formation of the gate poly contact for applying the gate voltage in a subsequent process, the contact formation becomes poor, thereby lowering the electrical characteristics of the gate. The electrical characteristics of this gate are usually measured by sheet resistance (Rs). In addition, the polymer 18 increases the gate width to lower the electrical characteristics of the gate. In this case, the electrical characteristics are lowered due to the sheet resistance value below the reference value. In addition, the polymer 18 causes poor step coverage in a PSG (Phosphorus Silicate Glass) or HTO (High Temperature Oxide) deposition process performed after gate formation.

SUMMARY OF THE INVENTION The present invention aims to address the degradation of electrical properties of gate electrodes due to polymers and to improve step coverage in subsequent processing steps of the gate forming process.

1A to 1E are process diagrams sequentially showing a conventional method for manufacturing a semiconductor device.

2A through 2F are sequential views showing a method of manufacturing a semiconductor device according to an embodiment of the present invention.

* Explanation of symbols for the main parts of the drawings

10 semiconductor substrate 12 gate oxide film

14 polysilicon film 16 photoresist pattern

18: polymer

According to a feature of the present invention proposed to achieve the above object, a manufacturing method of a semiconductor device comprises the steps of sequentially forming a gate oxide film and a polysilicon film for a gate electrode on the semiconductor substrate; Forming a photoresist pattern on the gate silicon polysilicon film; Etching the polysilicon film for the gate electrode using the photoresist pattern as a mask; And removing the polymer generated in the etching process of the polysilicon film for the gate electrode.

In a preferred embodiment of this aspect, the polymer removing step uses a mixed gas of fluorine-based gas and oxygen gas.

In a preferred embodiment of this feature, the fluorine-based gas is SxFy.

The present invention can effectively remove the polymer generated during the poly-etching of the gate electrode to improve the electrical characteristics of the gate electrode layer and to improve the step coverage according to the subsequent process.

Example

Hereinafter, embodiments of the present invention will be described in detail with reference to FIGS. 2A to 2F.

In Figs. 2A to 2F, the same reference numerals are given together for components having the same functions as those of the semiconductor device shown in Figs. 1A to 1E.

2A to 2F are process diagrams sequentially showing a method of manufacturing a semiconductor device according to an embodiment of the present invention.

Referring to FIG. 2A, a process step of forming a gate electrode layer firstly grows a gate oxide film 12 as an insulating film on a semiconductor substrate. Next, as shown in FIG. 2B, polysilicon is deposited on the grown gate oxide layer 12 to form a polysilicon layer 14 for a gate electrode. As shown in FIG. 2C, the photoresist pattern 16 is formed on the polysilicon layer 14 formed by defining a region where the gate electrode layer is to be formed by a photolithography process. The photoresist pattern 16 here serves as a mask to protect the gate region in a subsequent etching process. After the photolithography process, the polysilicon film 14 for the gate electrode is etched using the photoresist pattern 16 as a mask as shown in FIG. 2D. At this time, the etching is performed by dry etching for anisotropic etching. In the etching process of the polysilicon film 14 for the gate electrode, as shown in FIG. 2D, the polysilicon film 14 may be etched and the polymer 18 may be formed. After etching the polysilicon film 14 for the gate electrode, a process of removing the polymer 18 is performed in a novel process step of the present invention as shown in FIG. 2E. The polymer 18 removal mechanism uses a mixed gas of a fluorine-based gas and an oxygen (O 2) gas to determine the possibility of removing the polymer 18, applies it to an actual process, tests it, and then fixes the process conditions. The fluorine-based gas used for etching is SF6.

The reaction equation when the polymer 18 is etched using the mixed gas is as follows.

[Formula 3]

CxCly + SF6 + O2 → CO2 ↑ + CF4 ↑ + Cl ↑ +...

Process conditions for the polymer 18 etching process added during the gate forming process are shown in Table 1.

TABLE 1

The gap shown in Table 1 represents the distance between the cathode and the anode.

The equipment used to perform the process according to the polymer 18 etching process conditions is LAM 490, which is a plasma type etching equipment.

After this polymer 18 etching process, the photoresist pattern 16 is removed by ashing as in the prior art. The gas used for this ashing is oxygen (O2) gas.

At this time, if the process time of the ashing process takes about 20 minutes in the prior art, the process time of the ashing process according to the present invention takes about 5 minutes. The reason for this difference is that the photoresist is etched together to some extent during the polymer 18 etching process.

Finally, after performing the photoresist strip process with an H 2 SO 4 etching solution to remove the residual photoresist pattern 16 after the ashing process, a gate electrode layer as shown in FIG. 2F is formed.

According to the present invention, by effectively etching the polymer formed during the polysilicon etching for the gate electrode before the photoresist etching, the ashing process time for the photoresist pattern can be shortened in a subsequent process, and the contact formation during the gate poly contact formation can be improved. It is effective in eliminating the deterioration of the electrical characteristics of the gate due to the polymer and improving the step coverage.

Claims (3)

Sequentially forming an insulating film 12 and a polysilicon film 14 for a gate electrode on the semiconductor substrate 10; Forming a photoresist pattern (16) on said gate electrode polysilicon film (14); Etching the gate silicon polysilicon film (14) using the photoresist pattern (16) as a mask; And removing the polymer (18) generated in the etching process of the polysilicon film (14) for the gate electrode. The method of claim 1, The step of removing the polymer (18) uses a mixed gas in which a fluorine-based gas and an oxygen gas are mixed. The method of claim 2, The fluorine-based gas is SxFy manufacturing method of a semiconductor device.