KR102778708B1 - 심층 학습 인공 신경망에서 아날로그 신경 메모리를 위한 디코더들 - Google Patents

심층 학습 인공 신경망에서 아날로그 신경 메모리를 위한 디코더들 Download PDF

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KR102778708B1
KR102778708B1 KR1020237039451A KR20237039451A KR102778708B1 KR 102778708 B1 KR102778708 B1 KR 102778708B1 KR 1020237039451 A KR1020237039451 A KR 1020237039451A KR 20237039451 A KR20237039451 A KR 20237039451A KR 102778708 B1 KR102778708 B1 KR 102778708B1
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휴 반 트랜
스탠리 홍
안 리
투안 부
히엔 팜
카 느구옌
한 트란
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실리콘 스토리지 테크놀로지 인크
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/06—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
    • G06N3/063—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
    • G06N3/065—Analogue means
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00—Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10—Complex mathematical operations
    • G06F17/16—Matrix or vector computation, e.g. matrix-matrix or matrix-vector multiplication, matrix factorization
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/04—Architecture, e.g. interconnection topology
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/04—Architecture, e.g. interconnection topology
    • G06N3/045—Combinations of networks
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/04—Architecture, e.g. interconnection topology
    • G06N3/045—Combinations of networks
    • G06N3/0455—Auto-encoder networks; Encoder-decoder networks
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/04—Architecture, e.g. interconnection topology
    • G06N3/0464—Convolutional networks [CNN, ConvNet]
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/54—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using elements simulating biological cells, e.g. neuron
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0425—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a merged floating gate and select transistor
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/08—Address circuits; Decoders; Word-line control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/24—Bit-line control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C27/00—Electric analogue stores, e.g. for storing instantaneous values
    • G11C27/02—Sample-and-hold arrangements
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2216/00—Indexing scheme relating to G11C16/00 and subgroups, for features not directly covered by these groups
    • G11C2216/02—Structural aspects of erasable programmable read-only memories
    • G11C2216/04—Nonvolatile memory cell provided with a separate control gate for erasing the cells, i.e. erase gate, independent of the normal read control gate
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2216/00—Indexing scheme relating to G11C16/00 and subgroups, for features not directly covered by these groups
    • G11C2216/12—Reading and writing aspects of erasable programmable read-only memories
    • G11C2216/14—Circuits or methods to write a page or sector of information simultaneously into a nonvolatile memory, typically a complete row or word line in flash memory

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  • Biomedical Technology (AREA)
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  • Evolutionary Computation (AREA)
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  • Microelectronics & Electronic Packaging (AREA)
  • Neurology (AREA)
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  • Computational Mathematics (AREA)
  • Mathematical Optimization (AREA)
  • Pure & Applied Mathematics (AREA)
  • Algebra (AREA)
  • Databases & Information Systems (AREA)
  • Computer Hardware Design (AREA)
  • Non-Volatile Memory (AREA)
  • Read Only Memory (AREA)
  • Complex Calculations (AREA)
KR1020237039451A 2018-03-14 2019-01-24 심층 학습 인공 신경망에서 아날로그 신경 메모리를 위한 디코더들 Active KR102778708B1 (ko)

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KR1020257007057A KR20250035044A (ko) 2018-03-14 2019-01-24 심층 학습 인공 신경망에서 아날로그 신경 메모리를 위한 디코더들

Applications Claiming Priority (6)

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US201862642884P 2018-03-14 2018-03-14
US62/642,884 2018-03-14
US15/991,890 2018-05-29
US15/991,890 US11087207B2 (en) 2018-03-14 2018-05-29 Decoders for analog neural memory in deep learning artificial neural network
KR1020237010513A KR102604405B1 (ko) 2018-03-14 2019-01-24 심층 학습 인공 신경망에서 아날로그 신경 메모리를 위한 디코더들
PCT/US2019/015022 WO2019177698A1 (en) 2018-03-14 2019-01-24 Decoders for analog neural memory in deep learning artificial neural network

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KR102778708B1 true KR102778708B1 (ko) 2025-03-07

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KR1020257007057A Pending KR20250035044A (ko) 2018-03-14 2019-01-24 심층 학습 인공 신경망에서 아날로그 신경 메모리를 위한 디코더들
KR1020207022363A Active KR102516399B1 (ko) 2018-03-14 2019-01-24 심층 학습 인공 신경망에서 아날로그 신경 메모리를 위한 디코더들
KR1020237010513A Active KR102604405B1 (ko) 2018-03-14 2019-01-24 심층 학습 인공 신경망에서 아날로그 신경 메모리를 위한 디코더들

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KR1020207022363A Active KR102516399B1 (ko) 2018-03-14 2019-01-24 심층 학습 인공 신경망에서 아날로그 신경 메모리를 위한 디코더들
KR1020237010513A Active KR102604405B1 (ko) 2018-03-14 2019-01-24 심층 학습 인공 신경망에서 아날로그 신경 메모리를 위한 디코더들

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US (4) US11087207B2 (cg-RX-API-DMAC7.html)
EP (4) EP4650990A3 (cg-RX-API-DMAC7.html)
JP (4) JP7253563B2 (cg-RX-API-DMAC7.html)
KR (4) KR102778708B1 (cg-RX-API-DMAC7.html)
CN (2) CN119599075A (cg-RX-API-DMAC7.html)
TW (2) TWI764503B (cg-RX-API-DMAC7.html)
WO (1) WO2019177698A1 (cg-RX-API-DMAC7.html)

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