KR102637406B1 - 반도체 장치 및 반도체 장치의 제작 방법 - Google Patents
반도체 장치 및 반도체 장치의 제작 방법 Download PDFInfo
- Publication number
- KR102637406B1 KR102637406B1 KR1020207025705A KR20207025705A KR102637406B1 KR 102637406 B1 KR102637406 B1 KR 102637406B1 KR 1020207025705 A KR1020207025705 A KR 1020207025705A KR 20207025705 A KR20207025705 A KR 20207025705A KR 102637406 B1 KR102637406 B1 KR 102637406B1
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- South Korea
- Prior art keywords
- oxide
- insulator
- region
- additionally
- conductor
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
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- H01L29/7869—
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/674—Thin-film transistors [TFT] characterised by the active materials
- H10D30/6755—Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/3115—Doping the insulating layers
- H01L21/31155—Doping the insulating layers by ion implantation
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- H01L29/0847—
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- H01L29/66545—
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- H01L29/66969—
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- H01L29/78618—
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
- H10B12/05—Making the transistor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
- H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
- H10B12/312—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor with a bit line higher than the capacitor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
- H10B12/36—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the transistor being a FinFET
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
- H10D30/6713—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
- H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
- H10D30/6733—Multi-gate TFTs
- H10D30/6734—Multi-gate TFTs having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
- H10D62/149—Source or drain regions of field-effect devices
- H10D62/151—Source or drain regions of field-effect devices of IGFETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/017—Manufacture or treatment using dummy gates in processes wherein at least parts of the final gates are self-aligned to the dummy gates, i.e. replacement gate processes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D99/00—Subject matter not provided for in other groups of this subclass
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Thin Film Transistor (AREA)
- Semiconductor Memories (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Non-Volatile Memory (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JPJP-P-2018-035554 | 2018-02-28 | ||
| JP2018035554 | 2018-02-28 | ||
| PCT/IB2019/051278 WO2019166906A1 (ja) | 2018-02-28 | 2019-02-18 | 半導体装置、および半導体装置の作製方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20200126987A KR20200126987A (ko) | 2020-11-09 |
| KR102637406B1 true KR102637406B1 (ko) | 2024-02-15 |
Family
ID=67804852
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020207025705A Active KR102637406B1 (ko) | 2018-02-28 | 2019-02-18 | 반도체 장치 및 반도체 장치의 제작 방법 |
Country Status (5)
| Country | Link |
|---|---|
| US (2) | US11527657B2 (enExample) |
| JP (3) | JP7163360B2 (enExample) |
| KR (1) | KR102637406B1 (enExample) |
| CN (1) | CN111788696B (enExample) |
| WO (1) | WO2019166906A1 (enExample) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20200101964A (ko) | 2018-01-05 | 2020-08-28 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치 및 반도체 장치의 제작 방법 |
| CN111788696B (zh) * | 2018-02-28 | 2025-04-15 | 株式会社半导体能源研究所 | 半导体装置及半导体装置的制造方法 |
| US11211461B2 (en) * | 2018-12-28 | 2021-12-28 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and memory device |
| WO2020229915A1 (ja) | 2019-05-10 | 2020-11-19 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
| JPWO2021070007A1 (enExample) * | 2019-10-11 | 2021-04-15 | ||
| US12027632B2 (en) | 2021-04-19 | 2024-07-02 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor structure with barrier and method for manufacturing the same |
| US11791420B2 (en) | 2021-04-19 | 2023-10-17 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor device and method for manufacturing the same |
| US11869975B2 (en) | 2021-04-19 | 2024-01-09 | Taiwan Semiconductor Manufacturing Company, Ltd. | Thin-film transistors and method for manufacturing the same |
| US12347704B2 (en) | 2021-06-11 | 2025-07-01 | Taiwan Semiconductor Manufacturing Company, Ltd. | Wafer alignment apparatus and method for multi-cassette load port |
| JPWO2024190116A1 (enExample) * | 2023-03-16 | 2024-09-19 |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2013033923A (ja) | 2011-07-29 | 2013-02-14 | Samsung Electronics Co Ltd | 抵抗変化物質を含む半導体素子及びその製造方法 |
| JP2015188079A (ja) | 2014-03-14 | 2015-10-29 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
| JP2016213468A (ja) | 2015-05-11 | 2016-12-15 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
| US20160372606A1 (en) | 2015-06-19 | 2016-12-22 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device, manufacturing method thereof, and electronic device |
| JP2017028269A (ja) | 2015-07-17 | 2017-02-02 | 株式会社半導体エネルギー研究所 | 半導体装置、半導体装置の作製方法、および電子機器 |
| JP2017063192A (ja) | 2015-09-24 | 2017-03-30 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法、電子機器の作製方法、半導体装置、表示装置、記憶装置および電子機器 |
| JP2018022713A (ja) | 2015-06-19 | 2018-02-08 | 株式会社半導体エネルギー研究所 | 半導体装置、その作製方法、電子機器 |
Family Cites Families (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP6050662B2 (ja) * | 2011-12-02 | 2016-12-21 | 株式会社半導体エネルギー研究所 | 半導体装置及び半導体装置の作製方法 |
| TWI569446B (zh) | 2011-12-23 | 2017-02-01 | 半導體能源研究所股份有限公司 | 半導體元件、半導體元件的製造方法、及包含半導體元件的半導體裝置 |
| KR102290247B1 (ko) * | 2013-03-14 | 2021-08-13 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치와 그 제작 방법 |
| CN110047760A (zh) * | 2013-12-02 | 2019-07-23 | 株式会社半导体能源研究所 | 显示装置及其制造方法 |
| JP6444723B2 (ja) | 2014-01-09 | 2018-12-26 | 株式会社半導体エネルギー研究所 | 装置 |
| KR102649091B1 (ko) | 2015-02-06 | 2024-03-20 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치 및 그 제작 방법 |
| US10147823B2 (en) * | 2015-03-19 | 2018-12-04 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device |
| KR20160114511A (ko) | 2015-03-24 | 2016-10-05 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치의 제작 방법 |
| JP6736321B2 (ja) | 2015-03-27 | 2020-08-05 | 株式会社半導体エネルギー研究所 | 半導体装置の製造方法 |
| WO2017081579A1 (en) | 2015-11-13 | 2017-05-18 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and method for manufacturing the same |
| CN105489499B (zh) | 2015-12-21 | 2018-12-07 | 武汉华星光电技术有限公司 | Ltps薄膜晶体管制造方法 |
| KR20170096956A (ko) * | 2016-02-17 | 2017-08-25 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치, 전자 기기 |
| US10147681B2 (en) | 2016-12-09 | 2018-12-04 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device and manufacturing method thereof |
| KR102649488B1 (ko) | 2017-11-09 | 2024-03-21 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치 및 반도체 장치의 제작 방법 |
| KR102638143B1 (ko) * | 2018-01-24 | 2024-02-16 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 반도체 장치 및 반도체 장치의 제작 방법 |
| CN111788696B (zh) * | 2018-02-28 | 2025-04-15 | 株式会社半导体能源研究所 | 半导体装置及半导体装置的制造方法 |
-
2019
- 2019-02-18 CN CN201980015985.6A patent/CN111788696B/zh active Active
- 2019-02-18 JP JP2020503383A patent/JP7163360B2/ja active Active
- 2019-02-18 US US16/965,052 patent/US11527657B2/en active Active
- 2019-02-18 WO PCT/IB2019/051278 patent/WO2019166906A1/ja not_active Ceased
- 2019-02-18 KR KR1020207025705A patent/KR102637406B1/ko active Active
-
2022
- 2022-10-19 JP JP2022167378A patent/JP7493567B2/ja active Active
- 2022-12-08 US US18/077,452 patent/US11908949B2/en active Active
-
2024
- 2024-05-21 JP JP2024082347A patent/JP2024105659A/ja active Pending
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2013033923A (ja) | 2011-07-29 | 2013-02-14 | Samsung Electronics Co Ltd | 抵抗変化物質を含む半導体素子及びその製造方法 |
| JP2015188079A (ja) | 2014-03-14 | 2015-10-29 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
| JP2016213468A (ja) | 2015-05-11 | 2016-12-15 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法 |
| US20160372606A1 (en) | 2015-06-19 | 2016-12-22 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device, manufacturing method thereof, and electronic device |
| JP2018022713A (ja) | 2015-06-19 | 2018-02-08 | 株式会社半導体エネルギー研究所 | 半導体装置、その作製方法、電子機器 |
| JP2017028269A (ja) | 2015-07-17 | 2017-02-02 | 株式会社半導体エネルギー研究所 | 半導体装置、半導体装置の作製方法、および電子機器 |
| JP2017063192A (ja) | 2015-09-24 | 2017-03-30 | 株式会社半導体エネルギー研究所 | 半導体装置の作製方法、電子機器の作製方法、半導体装置、表示装置、記憶装置および電子機器 |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2022183298A (ja) | 2022-12-08 |
| WO2019166906A1 (ja) | 2019-09-06 |
| JPWO2019166906A1 (ja) | 2021-02-18 |
| US11527657B2 (en) | 2022-12-13 |
| JP7493567B2 (ja) | 2024-05-31 |
| JP2024105659A (ja) | 2024-08-06 |
| US11908949B2 (en) | 2024-02-20 |
| US20230109174A1 (en) | 2023-04-06 |
| CN111788696A (zh) | 2020-10-16 |
| JP7163360B2 (ja) | 2022-10-31 |
| KR20200126987A (ko) | 2020-11-09 |
| CN111788696B (zh) | 2025-04-15 |
| US20200357926A1 (en) | 2020-11-12 |
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Patent event date: 20200904 Patent event code: PA01051R01D Comment text: International Patent Application |
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Patent event code: PA02012R01D Patent event date: 20220215 Comment text: Request for Examination of Application |
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Comment text: Registration of Establishment Patent event date: 20240213 Patent event code: PR07011E01D |
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