CN111788696B - 半导体装置及半导体装置的制造方法 - Google Patents

半导体装置及半导体装置的制造方法 Download PDF

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Publication number
CN111788696B
CN111788696B CN201980015985.6A CN201980015985A CN111788696B CN 111788696 B CN111788696 B CN 111788696B CN 201980015985 A CN201980015985 A CN 201980015985A CN 111788696 B CN111788696 B CN 111788696B
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oxide
insulator
transistor
conductor
film
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CN111788696A (zh
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畑勇气
枥林克明
菅尾惇平
山崎舜平
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Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6755—Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/3115—Doping the insulating layers
    • H01L21/31155—Doping the insulating layers by ion implantation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/05—Making the transistor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
    • H10B12/312—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor with a bit line higher than the capacitor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/36—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the transistor being a FinFET
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6704—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6713—Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H10D30/6733—Multi-gate TFTs
    • H10D30/6734—Multi-gate TFTs having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/13—Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
    • H10D62/149—Source or drain regions of field-effect devices
    • H10D62/151—Source or drain regions of field-effect devices of IGFETs 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/017—Manufacture or treatment using dummy gates in processes wherein at least parts of the final gates are self-aligned to the dummy gates, i.e. replacement gate processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00—Subject matter not provided for in other groups of this subclass

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Thin Film Transistor (AREA)
  • Semiconductor Memories (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Non-Volatile Memory (AREA)
CN201980015985.6A 2018-02-28 2019-02-18 半导体装置及半导体装置的制造方法 Active CN111788696B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2018-035554 2018-02-28
JP2018035554 2018-02-28
PCT/IB2019/051278 WO2019166906A1 (ja) 2018-02-28 2019-02-18 半導体装置、および半導体装置の作製方法

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CN111788696A CN111788696A (zh) 2020-10-16
CN111788696B true CN111788696B (zh) 2025-04-15

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US (2) US11527657B2 (enExample)
JP (3) JP7163360B2 (enExample)
KR (1) KR102637406B1 (enExample)
CN (1) CN111788696B (enExample)
WO (1) WO2019166906A1 (enExample)

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WO2019166906A1 (ja) * 2018-02-28 2019-09-06 株式会社半導体エネルギー研究所 半導体装置、および半導体装置の作製方法
US11211461B2 (en) * 2018-12-28 2021-12-28 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and memory device
US12068198B2 (en) 2019-05-10 2024-08-20 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor device
JPWO2021070007A1 (enExample) * 2019-10-11 2021-04-15
US12027632B2 (en) 2021-04-19 2024-07-02 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor structure with barrier and method for manufacturing the same
US11791420B2 (en) * 2021-04-19 2023-10-17 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device and method for manufacturing the same
US11869975B2 (en) 2021-04-19 2024-01-09 Taiwan Semiconductor Manufacturing Company, Ltd. Thin-film transistors and method for manufacturing the same
US12347704B2 (en) 2021-06-11 2025-07-01 Taiwan Semiconductor Manufacturing Company, Ltd. Wafer alignment apparatus and method for multi-cassette load port
JPWO2024190116A1 (enExample) * 2023-03-16 2024-09-19

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TWI569446B (zh) * 2011-12-23 2017-02-01 半導體能源研究所股份有限公司 半導體元件、半導體元件的製造方法、及包含半導體元件的半導體裝置
KR102290247B1 (ko) * 2013-03-14 2021-08-13 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치와 그 제작 방법
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WO2019166906A1 (ja) * 2018-02-28 2019-09-06 株式会社半導体エネルギー研究所 半導体装置、および半導体装置の作製方法

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Also Published As

Publication number Publication date
CN111788696A (zh) 2020-10-16
KR20200126987A (ko) 2020-11-09
US11908949B2 (en) 2024-02-20
WO2019166906A1 (ja) 2019-09-06
JP7493567B2 (ja) 2024-05-31
JPWO2019166906A1 (ja) 2021-02-18
KR102637406B1 (ko) 2024-02-15
JP2022183298A (ja) 2022-12-08
JP2024105659A (ja) 2024-08-06
US20230109174A1 (en) 2023-04-06
JP7163360B2 (ja) 2022-10-31
US11527657B2 (en) 2022-12-13
US20200357926A1 (en) 2020-11-12

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