KR102396247B1 - 기판 처리 방법 - Google Patents

기판 처리 방법 Download PDF

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KR102396247B1
KR102396247B1 KR1020177006192A KR20177006192A KR102396247B1 KR 102396247 B1 KR102396247 B1 KR 102396247B1 KR 1020177006192 A KR1020177006192 A KR 1020177006192A KR 20177006192 A KR20177006192 A KR 20177006192A KR 102396247 B1 KR102396247 B1 KR 102396247B1
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substrate
fluorine
based layer
layer
plasma
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KR20170042315A (ko
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칸다바라 엔 태필리
후미타카 아마노
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도쿄엘렉트론가부시키가이샤
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28—Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/282—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials
    • H10P50/283—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials by chemical means
    • H01L21/02337—
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32192—Microwave generated discharge
    • H01L21/0206—
    • H01L21/02252—
    • H01L21/28238—
    • H01L21/28255—
    • H01L21/306—
    • H01L21/3105—
    • H01L21/31116—
    • H01L21/31122—
    • H01L21/321—
    • H01L29/16—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01332—Making the insulator
    • H10D64/01352—Making the insulator with sacrificial oxide
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01356—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being a Group IV material and not being silicon, e.g. Ge, SiGe or SiGeC
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6302—Non-deposition formation processes
    • H10P14/6319—Formation by plasma treatments, e.g. plasma oxidation of the substrate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/65—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
    • H10P14/6516—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials
    • H10P14/6529—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by exposure to a gas or vapour
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28—Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/282—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials
    • H10P50/283—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials by chemical means
    • H10P50/285—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials by chemical means of materials not containing Si, e.g. PZT or Al2O3
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P70/00—Cleaning of wafers, substrates or parts of devices
    • H10P70/20—Cleaning during device manufacture
    • H10P70/23—Cleaning during device manufacture during, before or after processing of insulating materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H10D62/832—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/681—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered
    • H10D64/685—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered being perpendicular to the channel plane
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/691—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator comprising metallic compounds, e.g. metal oxides or metal silicates 

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Formation Of Insulating Films (AREA)
  • Drying Of Semiconductors (AREA)
KR1020177006192A 2014-08-12 2015-08-11 기판 처리 방법 Active KR102396247B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US201462036474P 2014-08-12 2014-08-12
US62/036,474 2014-08-12
PCT/US2015/044623 WO2016025462A1 (en) 2014-08-12 2015-08-11 Substrate processing method

Publications (2)

Publication Number Publication Date
KR20170042315A KR20170042315A (ko) 2017-04-18
KR102396247B1 true KR102396247B1 (ko) 2022-05-09

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KR1020177006192A Active KR102396247B1 (ko) 2014-08-12 2015-08-11 기판 처리 방법

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US (1) US9558962B2 (enExample)
JP (1) JP6566430B2 (enExample)
KR (1) KR102396247B1 (enExample)
TW (1) TWI587389B (enExample)
WO (1) WO2016025462A1 (enExample)

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* Cited by examiner, † Cited by third party
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WO2012047945A2 (en) 2010-10-05 2012-04-12 Silcotek Corp. Wear resistant coating, article, and method
US20150118416A1 (en) * 2013-10-31 2015-04-30 Semes Co., Ltd. Substrate treating apparatus and method
JP6426489B2 (ja) * 2015-02-03 2018-11-21 東京エレクトロン株式会社 エッチング方法
US10276469B2 (en) * 2015-04-17 2019-04-30 Taiwan Semiconductor Manufacturing Co., Ltd Method for forming semiconductor device structure
WO2017040623A1 (en) 2015-09-01 2017-03-09 Silcotek Corp. Thermal chemical vapor deposition coating
US20170283943A1 (en) 2016-03-29 2017-10-05 Silcotek Corp. Treated article, system having treated article, and process incorporating treated article
US10580658B2 (en) * 2016-04-13 2020-03-03 Tokyo Electron Limited Method for preferential oxidation of silicon in substrates containing silicon and germanium
JP6742165B2 (ja) * 2016-06-14 2020-08-19 東京エレクトロン株式会社 窒化珪素膜の処理方法および窒化珪素膜の形成方法
US10707152B2 (en) * 2017-01-16 2020-07-07 Innolux Corporation High-frequency device and manufacturing method thereof
US11161324B2 (en) 2017-09-13 2021-11-02 Silcotek Corp. Corrosion-resistant coated article and thermal chemical vapor deposition coating process
US11388809B2 (en) * 2019-03-25 2022-07-12 Recarbon, Inc. Systems for controlling plasma reactors
WO2020252306A1 (en) 2019-06-14 2020-12-17 Silcotek Corp. Nano-wire growth
US12473635B2 (en) 2020-06-03 2025-11-18 Silcotek Corp. Dielectric article
JP2022112654A (ja) * 2021-01-22 2022-08-03 東京エレクトロン株式会社 接合システムおよび接合方法

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010056332A (ja) * 2008-08-28 2010-03-11 Iwatani Internatl Corp 半導体処理装置及び処理方法

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US6313042B1 (en) * 1999-09-03 2001-11-06 Applied Materials, Inc. Cleaning contact with successive fluorine and hydrogen plasmas
US6579812B2 (en) 2001-05-22 2003-06-17 Macronix International Co Ltd. Method for removing residual polymer after the dry etching process and reducing oxide loss
US6872323B1 (en) * 2001-11-01 2005-03-29 Novellus Systems, Inc. In situ plasma process to remove fluorine residues from the interior surfaces of a CVD reactor
US6746970B2 (en) 2002-06-24 2004-06-08 Macronix International Co., Ltd. Method of forming a fluorocarbon polymer film on a substrate using a passivation layer
US20050045206A1 (en) * 2003-08-26 2005-03-03 Smith Patricia Beauregard Post-etch clean process for porous low dielectric constant materials
US7977244B2 (en) * 2006-12-18 2011-07-12 United Microelectronics Corp. Semiconductor manufacturing process
JP5084250B2 (ja) * 2006-12-26 2012-11-28 東京エレクトロン株式会社 ガス処理装置およびガス処理方法ならびに記憶媒体
JP5374039B2 (ja) 2007-12-27 2013-12-25 東京エレクトロン株式会社 基板処理方法、基板処理装置及び記憶媒体
US8133797B2 (en) 2008-05-16 2012-03-13 Novellus Systems, Inc. Protective layer to enable damage free gap fill
JP5492574B2 (ja) * 2010-01-08 2014-05-14 東京エレクトロン株式会社 基板のクリーニング方法及び基板のクリーニング装置
US20120273861A1 (en) 2011-04-29 2012-11-01 Shanghan Institute Of Microsystem And Imformation Technology,Chinese Academ Method of depositing gate dielectric, method of preparing mis capacitor, and mis capacitor
US20130012012A1 (en) * 2011-07-10 2013-01-10 Chien-Liang Lin Semiconductor process
US8679982B2 (en) * 2011-08-26 2014-03-25 Applied Materials, Inc. Selective suppression of dry-etch rate of materials containing both silicon and oxygen
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Publication number Publication date
TWI587389B (zh) 2017-06-11
WO2016025462A1 (en) 2016-02-18
JP2017526181A (ja) 2017-09-07
JP6566430B2 (ja) 2019-08-28
US20160049309A1 (en) 2016-02-18
WO2016025462A9 (en) 2016-04-07
KR20170042315A (ko) 2017-04-18
TW201614728A (en) 2016-04-16
US9558962B2 (en) 2017-01-31

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