TWI587389B - 基板處理方法 - Google Patents

基板處理方法 Download PDF

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Publication number
TWI587389B
TWI587389B TW104126042A TW104126042A TWI587389B TW I587389 B TWI587389 B TW I587389B TW 104126042 A TW104126042 A TW 104126042A TW 104126042 A TW104126042 A TW 104126042A TW I587389 B TWI587389 B TW I587389B
Authority
TW
Taiwan
Prior art keywords
substrate
fluorine
processing method
layer
based layer
Prior art date
Application number
TW104126042A
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English (en)
Chinese (zh)
Other versions
TW201614728A (en
Inventor
坎達巴拉 N 泰伯利
天野文貴
Original Assignee
東京威力科創股份有限公司
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Publication date
Application filed by 東京威力科創股份有限公司 filed Critical 東京威力科創股份有限公司
Publication of TW201614728A publication Critical patent/TW201614728A/zh
Application granted granted Critical
Publication of TWI587389B publication Critical patent/TWI587389B/zh

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Classifications

    • H10P50/283
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01JELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32Gas-filled discharge tubes
    • H01J37/32009Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32192Microwave generated discharge
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H10D64/01352
    • H10D64/01356
    • H10P14/6319
    • H10P14/6529
    • H10P50/00
    • H10P50/285
    • H10P70/23
    • H10P95/00
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H10D62/832Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/60Electrodes characterised by their materials
    • H10D64/66Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/681Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered
    • H10D64/685Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered being perpendicular to the channel plane
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/60Electrodes characterised by their materials
    • H10D64/66Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/691Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator comprising metallic compounds, e.g. metal oxides or metal silicates 

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Plasma & Fusion (AREA)
  • Analytical Chemistry (AREA)
  • Formation Of Insulating Films (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Drying Of Semiconductors (AREA)
TW104126042A 2014-08-12 2015-08-11 基板處理方法 TWI587389B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US201462036474P 2014-08-12 2014-08-12

Publications (2)

Publication Number Publication Date
TW201614728A TW201614728A (en) 2016-04-16
TWI587389B true TWI587389B (zh) 2017-06-11

Family

ID=55302680

Family Applications (1)

Application Number Title Priority Date Filing Date
TW104126042A TWI587389B (zh) 2014-08-12 2015-08-11 基板處理方法

Country Status (5)

Country Link
US (1) US9558962B2 (enExample)
JP (1) JP6566430B2 (enExample)
KR (1) KR102396247B1 (enExample)
TW (1) TWI587389B (enExample)
WO (1) WO2016025462A1 (enExample)

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KR101790206B1 (ko) 2010-10-05 2017-10-25 실코텍 코포레이션 내마모성 코팅, 물건 및 방법
US20150118416A1 (en) * 2013-10-31 2015-04-30 Semes Co., Ltd. Substrate treating apparatus and method
JP6426489B2 (ja) * 2015-02-03 2018-11-21 東京エレクトロン株式会社 エッチング方法
US10276469B2 (en) * 2015-04-17 2019-04-30 Taiwan Semiconductor Manufacturing Co., Ltd Method for forming semiconductor device structure
WO2017040623A1 (en) 2015-09-01 2017-03-09 Silcotek Corp. Thermal chemical vapor deposition coating
US20170283943A1 (en) 2016-03-29 2017-10-05 Silcotek Corp. Treated article, system having treated article, and process incorporating treated article
US10580658B2 (en) * 2016-04-13 2020-03-03 Tokyo Electron Limited Method for preferential oxidation of silicon in substrates containing silicon and germanium
JP6742165B2 (ja) * 2016-06-14 2020-08-19 東京エレクトロン株式会社 窒化珪素膜の処理方法および窒化珪素膜の形成方法
US10707152B2 (en) * 2017-01-16 2020-07-07 Innolux Corporation High-frequency device and manufacturing method thereof
US11161324B2 (en) 2017-09-13 2021-11-02 Silcotek Corp. Corrosion-resistant coated article and thermal chemical vapor deposition coating process
US11388809B2 (en) * 2019-03-25 2022-07-12 Recarbon, Inc. Systems for controlling plasma reactors
WO2020252306A1 (en) 2019-06-14 2020-12-17 Silcotek Corp. Nano-wire growth
US12473635B2 (en) 2020-06-03 2025-11-18 Silcotek Corp. Dielectric article
JP2022112654A (ja) * 2021-01-22 2022-08-03 東京エレクトロン株式会社 接合システムおよび接合方法

Citations (5)

* Cited by examiner, † Cited by third party
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US6872323B1 (en) * 2001-11-01 2005-03-29 Novellus Systems, Inc. In situ plasma process to remove fluorine residues from the interior surfaces of a CVD reactor
US20120273861A1 (en) * 2011-04-29 2012-11-01 Shanghan Institute Of Microsystem And Imformation Technology,Chinese Academ Method of depositing gate dielectric, method of preparing mis capacitor, and mis capacitor
US20130012012A1 (en) * 2011-07-10 2013-01-10 Chien-Liang Lin Semiconductor process
TW201314768A (zh) * 2011-08-26 2013-04-01 應用材料股份有限公司 選擇性抑制含有矽及氧兩者之材料的乾式蝕刻速率
TW201320186A (zh) * 2011-09-01 2013-05-16 應用材料股份有限公司 選擇性抑制含有矽及氮兩者之材料的乾蝕刻率之方法

Family Cites Families (10)

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US6313042B1 (en) * 1999-09-03 2001-11-06 Applied Materials, Inc. Cleaning contact with successive fluorine and hydrogen plasmas
US6579812B2 (en) 2001-05-22 2003-06-17 Macronix International Co Ltd. Method for removing residual polymer after the dry etching process and reducing oxide loss
US6746970B2 (en) 2002-06-24 2004-06-08 Macronix International Co., Ltd. Method of forming a fluorocarbon polymer film on a substrate using a passivation layer
US20050045206A1 (en) * 2003-08-26 2005-03-03 Smith Patricia Beauregard Post-etch clean process for porous low dielectric constant materials
US7977244B2 (en) * 2006-12-18 2011-07-12 United Microelectronics Corp. Semiconductor manufacturing process
JP5084250B2 (ja) * 2006-12-26 2012-11-28 東京エレクトロン株式会社 ガス処理装置およびガス処理方法ならびに記憶媒体
JP5374039B2 (ja) 2007-12-27 2013-12-25 東京エレクトロン株式会社 基板処理方法、基板処理装置及び記憶媒体
US8133797B2 (en) * 2008-05-16 2012-03-13 Novellus Systems, Inc. Protective layer to enable damage free gap fill
JP5508701B2 (ja) * 2008-08-28 2014-06-04 岩谷産業株式会社 半導体処理装置及び処理方法
JP5492574B2 (ja) * 2010-01-08 2014-05-14 東京エレクトロン株式会社 基板のクリーニング方法及び基板のクリーニング装置

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6872323B1 (en) * 2001-11-01 2005-03-29 Novellus Systems, Inc. In situ plasma process to remove fluorine residues from the interior surfaces of a CVD reactor
US20120273861A1 (en) * 2011-04-29 2012-11-01 Shanghan Institute Of Microsystem And Imformation Technology,Chinese Academ Method of depositing gate dielectric, method of preparing mis capacitor, and mis capacitor
US20130012012A1 (en) * 2011-07-10 2013-01-10 Chien-Liang Lin Semiconductor process
TW201314768A (zh) * 2011-08-26 2013-04-01 應用材料股份有限公司 選擇性抑制含有矽及氧兩者之材料的乾式蝕刻速率
TW201320186A (zh) * 2011-09-01 2013-05-16 應用材料股份有限公司 選擇性抑制含有矽及氮兩者之材料的乾蝕刻率之方法

Also Published As

Publication number Publication date
KR20170042315A (ko) 2017-04-18
WO2016025462A9 (en) 2016-04-07
WO2016025462A1 (en) 2016-02-18
JP2017526181A (ja) 2017-09-07
KR102396247B1 (ko) 2022-05-09
US20160049309A1 (en) 2016-02-18
US9558962B2 (en) 2017-01-31
TW201614728A (en) 2016-04-16
JP6566430B2 (ja) 2019-08-28

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