KR102037924B1 - Test tray for using test handler - Google Patents
Test tray for using test handler Download PDFInfo
- Publication number
- KR102037924B1 KR102037924B1 KR1020130051727A KR20130051727A KR102037924B1 KR 102037924 B1 KR102037924 B1 KR 102037924B1 KR 1020130051727 A KR1020130051727 A KR 1020130051727A KR 20130051727 A KR20130051727 A KR 20130051727A KR 102037924 B1 KR102037924 B1 KR 102037924B1
- Authority
- KR
- South Korea
- Prior art keywords
- test
- semiconductor element
- connection terminal
- electrical connection
- connection
- Prior art date
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Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2855—Environmental, reliability or burn-in testing
- G01R31/286—External aspects, e.g. related to chambers, contacting devices or handlers
- G01R31/2865—Holding devices, e.g. chucks; Handlers or transport devices
- G01R31/2867—Handlers or transport devices, e.g. loaders, carriers, trays
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/26—Testing of individual semiconductor devices
- G01R31/2601—Apparatus or methods therefor
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Environmental & Geological Engineering (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Engineering & Computer Science (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
Abstract
A test tray for a test handler includes: a test tray for a test handler having a plurality of inserts on which a semiconductor device for testing may be seated, the insert comprising: a main body providing a space in which the semiconductor device may be seated; A printed circuit board provided below the main body so as to face the connection terminal of the semiconductor device when the semiconductor device is seated; When the semiconductor element is seated on the main body, it is electrically connected to the connection terminal of the semiconductor element by contacting the connection terminal of the semiconductor element on one surface of the printed circuit board facing the connection terminal of the semiconductor element. An electrical connection part electrically connected to the wiring of the printed circuit board; And a connection alignment unit arranged to surround a periphery of the electrical connection unit and aligning the connection terminal of the semiconductor element with the electrical connection unit when the connection terminal of the semiconductor element is connected to the electrical connection unit.
Description
The present invention relates to a test tray for a test handler, and more particularly, to a test tray for a test handler having a plurality of inserts on which a semiconductor device for a test can be seated.
In the manufacture of electronic components such as integrated circuit devices, a packaged integrated circuit device (hereinafter referred to as a semiconductor device) performs tests such as electrical performance and thermal stress. In particular, a test handler is an example of an apparatus for electrically testing the aforementioned semiconductor device. And the test of the semiconductor device using the test handler can be mainly achieved by electrically connecting the semiconductor devices accommodated in the test tray to the test socket of the test board.
Here, each of the semiconductor devices accommodated in the test tray has a structure seated on each of the inserts provided in the test tray. That is, the test tray has a structure having a plurality of inserts on which a semiconductor device for testing can be seated. In the test of the semiconductor device using the test tray mentioned above, it can be achieved by electrically connecting the connection terminal of the semiconductor device and the connection terminal of the test socket seated on the insert of the test tray.
However, in the electrical connection between the connection terminal of the semiconductor element seated on the insert of the test tray and the connection terminal of the test socket, the connection terminal of the semiconductor element connection terminal and the test socket due to the structure of the insert, the length of the connection terminal of the test socket, etc. Interference occurs in the electrical connection of the device, and as a result, a situation frequently occurs in which electrical connection between the connection terminal of the semiconductor element and the connection terminal of the test socket is not easily performed.
An example for solving interference caused by a connection occurring between a connection terminal of a semiconductor device and a connection terminal of a test socket is disclosed in Korean Patent Application No. 2004-7002474 (hereinafter referred to as a 'cited document'). In particular, the cited reference discloses an insert having a support at the portion facing the test socket. Thus, the use of the insert having the aforementioned supporting portion eliminates interference due to the electrical connection between the connection terminal of the semiconductor element and the connection terminal of the test socket.
However, since the mentioned support part may be provided in the lower part of the insert mainly by fusion using ultrasonic waves, there is a problem in that manufacturing time increases due to fusion, and when the support part is damaged, the insert cannot be reused and the entire insert needs to be replaced. There is a problem that the life of the insert is shortened.
SUMMARY OF THE INVENTION An object of the present invention is to provide a test tray for a test handler which can not only sufficiently eliminate interference due to the connection of the connection terminal of the semiconductor element and the connection terminal of the test socket, but also can be easily assembled and extend the life.
A test tray for a test handler according to an embodiment of the present invention for achieving the above-mentioned object is a test tray for a test handler having a plurality of inserts on which a semiconductor device for testing can be seated, wherein the insert is the A main body providing a space in which the semiconductor device may be seated; A printed circuit board provided below the main body so as to face the connection terminal of the semiconductor device when the semiconductor device is seated; When the semiconductor element is seated on the main body, it is electrically connected to the connection terminal of the semiconductor element by contacting the connection terminal of the semiconductor element on one surface of the printed circuit board facing the connection terminal of the semiconductor element. An electrical connection part electrically connected to the wiring of the printed circuit board; And a connection alignment unit arranged to surround a periphery of the electrical connection unit and aligning the connection terminal of the semiconductor element with the electrical connection unit when the connection terminal of the semiconductor element is connected to the electrical connection unit.
In the test tray for a test handler according to an embodiment of the present invention mentioned above, the printed circuit board may be provided to have a structure coupled to the main body by bolt assembly, the electrical connection may be made of a conductive rubber material The electrical connection part and the connection alignment part may be formed on one surface of the printed circuit board by performing a deposition process.
The test tray for the test handler of the present invention mentioned above has a printed circuit board positioned so as to face the connecting terminal of the semiconductor element when the semiconductor element is seated under the insert body, and the connection terminal of the semiconductor element on one surface of the printed circuit board. By contact with and may be electrically connected to the connection terminal of the semiconductor element and an electrical connection that is electrically connected to the wiring of the printed circuit board.
Therefore, since the interference due to the connection between the connection terminal of the semiconductor device and the connection terminal of the test socket can be sufficiently eliminated by using the insert having the above-mentioned printed circuit board, the reliability according to the test of the semiconductor device is improved. It works.
In addition, in the case of the printed circuit board, it can be provided in the lower portion of the printed circuit board through the bolt coupling can be expected to be easy to assemble, and if the printed circuit board is damaged, only the printed circuit board itself can be replaced. This can be expected to extend the life of the insert as a whole.
1 is a block diagram schematically illustrating a test tray for a test handler according to an embodiment of the present invention.
FIG. 2 is a diagram illustrating an insert provided in a test tray for a test handler of FIG. 1.
As the inventive concept allows for various changes and numerous embodiments, the embodiments will be described in detail in the text. However, this is not intended to limit the present invention to a specific disclosed form, it should be understood to include all modifications, equivalents, and substitutes included in the spirit and scope of the present invention. In describing the drawings, similar reference numerals are used for similar components. Terms such as first and second may be used to describe various components, but the components should not be limited by the terms. The terms are used only for the purpose of distinguishing one component from another. The terminology used herein is for the purpose of describing particular example embodiments only and is not intended to be limiting of the present invention. Singular expressions include plural expressions unless the context clearly indicates otherwise. In this application, the terms "comprise" or "consist of" are intended to indicate that there is a feature, number, step, operation, component, part, or combination thereof described on the specification, but one or more other features. It is to be understood that the present invention does not exclude the possibility of the presence or the addition of numbers, steps, operations, components, parts, or combinations thereof.
Unless defined otherwise, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art. Terms such as those defined in the commonly used dictionaries should be construed as having meanings consistent with the meanings in the context of the related art and shall not be construed in ideal or excessively formal meanings unless expressly defined in this application. Do not.
Example
First, although not shown, the test handler of the present invention may include a test tray, a loading member, a soak chamber, a test chamber, a pushing member, a desoak, an unloading member, and the like.
The test tray has a plurality of inserts on which the semiconductor element can be seated as described below, and circulates along a closed path defined by a plurality of transfer members or the like for testing.
The loading member mentioned above loads the semiconductor element to be tested loaded on the customer tray into the test tray in the loading position.
The aforementioned inner chamber is provided for preheating or precooling the semiconductor element loaded in the test tray transferred from the loading position according to the test environmental conditions prior to performing the test.
The test chamber mentioned above is provided for testing a semiconductor device loaded in a test tray which is preheated or precooled in the inner chamber and then transferred to a test position.
The mentioned pushing member is loaded into a test tray in the test chamber and pushes the semiconductor element seated on the insert toward the test socket of the tester device docked in the tester chamber to electrically transfer the semiconductor element to the test socket of the tester device, i.e. the test socket of the test board. Is provided to connect.
In the Di-speed chamber, a heating or cooled semiconductor element loaded in a test tray transferred from the test chamber is provided to return to room temperature.
The unloading member classifies the semiconductor devices loaded on the test trays from the dichroic chamber into the unloading position by test grade and unloads them into empty customer trays.
As mentioned, the semiconductor device has a structure that circulates along a closed path moving from the loading position to the unloading position from the loading position to the unloading position by being loaded on the test tray and seated on the insert.
The test of the semiconductor device using the test handler mentioned above can be achieved by electrically connecting the connection terminal of the semiconductor device and the connection terminal of the test socket seated on the insert of the test tray. That is, by connecting the test tray toward the test apparatus and pushing the test tray toward the test apparatus using the pushing member, the connection terminal of the semiconductor element seated on the insert of the test tray is connected to the test socket on the test apparatus side. It can be achieved by electrical connection to the.
Hereinafter, a test tray having an insert mentioned with reference to the drawings will be described.
1 is a block diagram schematically illustrating a test tray for a test handler according to an embodiment of the present invention, and FIG. 2 is a view illustrating an insert provided in the test tray for the test handler of FIG. 1.
1 and 2, as mentioned above, the
The
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The
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In addition, the shape of the
In addition, the space | interval of the
As described above, the
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In addition, if the printed
Since the test tray for the test handler of the present invention mentioned above can sufficiently improve the reliability of the test of the semiconductor device by sufficiently eliminating interference due to the connection of the connection terminal of the semiconductor device and the connection terminal of the test socket, the semiconductor device is manufactured. We can expect to strengthen our product competitiveness by improving the reliability.
In addition, the test tray for the test handler of the present invention mentioned above can be expected to enhance the price competitiveness through the improvement of productivity according to the manufacture of semiconductor devices by the ease of assembly and the extension of the life for the test tray itself.
While the foregoing has been described with reference to preferred embodiments of the present invention, those skilled in the art will be able to variously modify and change the present invention without departing from the spirit and scope of the invention as set forth in the claims below. It will be appreciated.
11
15: connection terminal 21: main body
23: space 31: printed circuit board
33: electrical connection 35: connection alignment
37: wiring 41: bolt
100: test tray
Claims (3)
The insert is
A main body providing a space in which the semiconductor element may be seated;
A printed circuit board provided below the main body so as to face the connection terminal of the semiconductor device when the semiconductor device is seated;
When the semiconductor element is seated on the main body, it is electrically connected to the connection terminal of the semiconductor element by contacting the connection terminal of the semiconductor element on one surface of the printed circuit board facing the connection terminal of the semiconductor element. An electrical connection part electrically connected to the wiring of the printed circuit board; And
It is provided so as to surround the periphery of the said electrical connection part, When the connection terminal of the said semiconductor element connects with the said electrical connection part, The connection alignment part which arranges between the connection terminal of the said semiconductor element and the said electrical connection part is included,
The electrical connection portion and the connection alignment portion is provided to be formed on one surface of the printed circuit board by performing a deposition process,
When the connection terminal of the semiconductor element is provided to have a circular ball structure, the electrical connection portion is provided to have a circular shape, and the connection alignment portion is provided to have a cylindrical shape surrounding the circular electrical connection portion. Test tray for test handlers.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020130051727A KR102037924B1 (en) | 2013-05-08 | 2013-05-08 | Test tray for using test handler |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020130051727A KR102037924B1 (en) | 2013-05-08 | 2013-05-08 | Test tray for using test handler |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20140132856A KR20140132856A (en) | 2014-11-19 |
KR102037924B1 true KR102037924B1 (en) | 2019-10-29 |
Family
ID=52453654
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1020130051727A KR102037924B1 (en) | 2013-05-08 | 2013-05-08 | Test tray for using test handler |
Country Status (1)
Country | Link |
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KR (1) | KR102037924B1 (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR102372899B1 (en) * | 2016-08-09 | 2022-03-11 | 주식회사 아이에스시 | Hi-Fix socket board and Hi-Fix board having the same |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002270321A (en) * | 2001-03-07 | 2002-09-20 | Advanex Inc | Socket for semiconductor package |
KR200414883Y1 (en) * | 2006-02-10 | 2006-04-26 | 주식회사 아이에스시테크놀러지 | Carrier unit for semiconductor device |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20070062085A (en) * | 2005-12-12 | 2007-06-15 | 삼성전자주식회사 | Insert for semiconductor package |
KR101076475B1 (en) * | 2009-05-11 | 2011-10-26 | 주식회사 아이에스시테크놀러지 | Handler for test |
-
2013
- 2013-05-08 KR KR1020130051727A patent/KR102037924B1/en active IP Right Grant
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002270321A (en) * | 2001-03-07 | 2002-09-20 | Advanex Inc | Socket for semiconductor package |
KR200414883Y1 (en) * | 2006-02-10 | 2006-04-26 | 주식회사 아이에스시테크놀러지 | Carrier unit for semiconductor device |
Also Published As
Publication number | Publication date |
---|---|
KR20140132856A (en) | 2014-11-19 |
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