KR101639771B1 - 패싯 형상의 실리사이드 콘택들을 갖는 반도체 디바이스, 및 관련 제조 방법 - Google Patents
패싯 형상의 실리사이드 콘택들을 갖는 반도체 디바이스, 및 관련 제조 방법 Download PDFInfo
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- KR101639771B1 KR101639771B1 KR1020117010636A KR20117010636A KR101639771B1 KR 101639771 B1 KR101639771 B1 KR 101639771B1 KR 1020117010636 A KR1020117010636 A KR 1020117010636A KR 20117010636 A KR20117010636 A KR 20117010636A KR 101639771 B1 KR101639771 B1 KR 101639771B1
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/01—Manufacture or treatment
- H10D62/021—Forming source or drain recesses by etching e.g. recessing by etching and then refilling
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/027—Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs
- H10D30/0275—Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs forming single crystalline semiconductor source or drain regions resulting in recessed gates, e.g. forming raised source or drain regions
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/791—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions
- H10D30/797—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions being in source or drain regions, e.g. SiGe source or drain
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/40—Crystalline structures
- H10D62/405—Orientations of crystalline planes
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions
- H10D64/23—Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
- H10D64/251—Source or drain electrodes for field-effect devices
- H10D64/256—Source or drain electrodes for field-effect devices for lateral devices wherein the source or drain electrodes are recessed in semiconductor bodies
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/27—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using selective deposition, e.g. simultaneous growth of monocrystalline and non-monocrystalline semiconductor materials
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
- H10P14/2926—Crystal orientations
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/34—Deposited materials, e.g. layers
- H10P14/3466—Crystal orientation
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/0212—Manufacture or treatment of FETs having insulated gates [IGFET] using self-aligned silicidation
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/015—Manufacture or treatment removing at least parts of gate spacers, e.g. disposable spacers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/017—Manufacture or treatment using dummy gates in processes wherein at least parts of the final gates are self-aligned to the dummy gates, i.e. replacement gate processes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/01—Manufacture or treatment
- H10D64/021—Manufacture or treatment using multiple gate spacer layers, e.g. bilayered sidewall spacers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
- H10P14/2901—Materials
- H10P14/2902—Materials being Group IVA materials
- H10P14/2905—Silicon, silicon germanium or germanium
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/34—Deposited materials, e.g. layers
- H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
- H10P14/3404—Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
- H10P14/3408—Silicon carbide
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/34—Deposited materials, e.g. layers
- H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
- H10P14/3404—Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
- H10P14/3411—Silicon, silicon germanium or germanium
Landscapes
- Insulated Gate Type Field-Effect Transistor (AREA)
- Electrodes Of Semiconductors (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Recrystallisation Techniques (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US12/249,570 US7994014B2 (en) | 2008-10-10 | 2008-10-10 | Semiconductor devices having faceted silicide contacts, and related fabrication methods |
| US12/249,570 | 2008-10-10 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20110091667A KR20110091667A (ko) | 2011-08-12 |
| KR101639771B1 true KR101639771B1 (ko) | 2016-07-14 |
Family
ID=42062020
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020117010636A Expired - Fee Related KR101639771B1 (ko) | 2008-10-10 | 2009-10-05 | 패싯 형상의 실리사이드 콘택들을 갖는 반도체 디바이스, 및 관련 제조 방법 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US7994014B2 (https=) |
| EP (1) | EP2345065A2 (https=) |
| JP (1) | JP5785496B2 (https=) |
| KR (1) | KR101639771B1 (https=) |
| CN (1) | CN102177573B (https=) |
| WO (1) | WO2010051133A2 (https=) |
Families Citing this family (22)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7445978B2 (en) * | 2005-05-04 | 2008-11-04 | Chartered Semiconductor Manufacturing, Ltd | Method to remove spacer after salicidation to enhance contact etch stop liner stress on MOS |
| DE102009031114B4 (de) * | 2009-06-30 | 2011-07-07 | Globalfoundries Dresden Module One LLC & CO. KG, 01109 | Halbleiterelement, das in einem kristallinen Substratmaterial hergestellt ist und ein eingebettetes in-situ n-dotiertes Halbleitermaterial aufweist, und Verfahren zur Herstellung desselben |
| US8361867B2 (en) * | 2010-03-19 | 2013-01-29 | Acorn Technologies, Inc. | Biaxial strained field effect transistor devices |
| US8492234B2 (en) * | 2010-06-29 | 2013-07-23 | International Business Machines Corporation | Field effect transistor device |
| DE102010030768B4 (de) | 2010-06-30 | 2012-05-31 | GLOBALFOUNDRIES Dresden Module One Ltd. Liability Company & Co. KG | Herstellverfahren für ein Halbleiterbauelement als Transistor mit eingebettetem Si/Ge-Material mit geringerem Abstand und besserer Gleichmäßigkeit und Transistor |
| DE102011076695B4 (de) * | 2011-05-30 | 2013-05-08 | Globalfoundries Inc. | Transistoren mit eingebettetem verformungsinduzierenden Material, das in durch einen Oxidationsätzprozess erzeugten Aussparungen ausgebildet ist |
| US9190471B2 (en) * | 2012-04-13 | 2015-11-17 | Globalfoundries U.S.2 Llc | Semiconductor structure having a source and a drain with reverse facets |
| US9012999B2 (en) * | 2012-08-21 | 2015-04-21 | Stmicroelectronics, Inc. | Semiconductor device with an inclined source/drain and associated methods |
| US20140057399A1 (en) * | 2012-08-24 | 2014-02-27 | International Business Machines Corporation | Using Fast Anneal to Form Uniform Ni(Pt)Si(Ge) Contacts on SiGe Layer |
| US20140170826A1 (en) * | 2012-12-19 | 2014-06-19 | Acorn Technologies, Inc. | Biaxial strained field effect transistor devices |
| US9627480B2 (en) * | 2014-06-26 | 2017-04-18 | Globalfoundries Inc. | Junction butting structure using nonuniform trench shape |
| US9647073B2 (en) | 2014-10-29 | 2017-05-09 | Globalfoundries Inc. | Transistor structures and fabrication methods thereof |
| CN105762106B (zh) * | 2014-12-18 | 2021-02-19 | 联华电子股份有限公司 | 半导体装置及其制作工艺 |
| CN107636804B (zh) * | 2015-06-27 | 2022-06-07 | 英特尔公司 | 用以使用量化金属形成与半导体的欧姆接触的方法 |
| CN107275210B (zh) * | 2016-04-06 | 2023-05-02 | 联华电子股份有限公司 | 半导体元件及其制作方法 |
| US10643893B2 (en) | 2016-06-29 | 2020-05-05 | International Business Machines Corporation | Surface area and Schottky barrier height engineering for contact trench epitaxy |
| US10396208B2 (en) | 2017-01-13 | 2019-08-27 | International Business Machines Corporation | Vertical transistors with improved top source/drain junctions |
| KR102257419B1 (ko) | 2017-06-07 | 2021-05-31 | 삼성전자주식회사 | 반도체 장치 및 그 제조 방법 |
| US10217660B2 (en) * | 2017-07-18 | 2019-02-26 | Globalfoundries Inc. | Technique for patterning active regions of transistor elements in a late manufacturing stage |
| US10580977B2 (en) | 2018-07-24 | 2020-03-03 | International Business Machines Corporation | Tightly integrated 1T1R ReRAM for planar technology |
| US10777642B2 (en) * | 2019-01-30 | 2020-09-15 | Globalfoundries Inc. | Formation of enhanced faceted raised source/drain epi material for transistor devices |
| US10825897B2 (en) | 2019-01-30 | 2020-11-03 | Globalfoundries Inc. | Formation of enhanced faceted raised source/drain EPI material for transistor devices |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006024809A (ja) * | 2004-07-09 | 2006-01-26 | Renesas Technology Corp | 半導体装置及びその製造方法 |
| US20060289856A1 (en) | 2005-06-22 | 2006-12-28 | Fujitsu Limited | Semiconductor device and production method thereof |
| JP2008010871A (ja) * | 2006-06-29 | 2008-01-17 | Internatl Business Mach Corp <Ibm> | 傾斜側壁表面を備えたソース/ドレイン陥凹部を有するmosfetおよびこれを形成するための方法 |
Family Cites Families (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH05283685A (ja) * | 1992-04-03 | 1993-10-29 | Ricoh Co Ltd | 半導体装置とその製造方法 |
| US5323053A (en) * | 1992-05-28 | 1994-06-21 | At&T Bell Laboratories | Semiconductor devices using epitaxial silicides on (111) surfaces etched in (100) silicon substrates |
| JPH07183486A (ja) * | 1993-12-24 | 1995-07-21 | Toshiba Corp | 半導体装置及びその製造方法 |
| JP2964925B2 (ja) * | 1994-10-12 | 1999-10-18 | 日本電気株式会社 | 相補型mis型fetの製造方法 |
| JPH08340106A (ja) * | 1995-06-12 | 1996-12-24 | Matsushita Electric Ind Co Ltd | 半導体装置の製造方法 |
| JP4837902B2 (ja) * | 2004-06-24 | 2011-12-14 | 富士通セミコンダクター株式会社 | 半導体装置 |
| US7253086B2 (en) * | 2004-10-18 | 2007-08-07 | Texas Instruments Incorporated | Recessed drain extensions in transistor device |
| US20060115949A1 (en) * | 2004-12-01 | 2006-06-01 | Freescale Semiconductor, Inc. | Semiconductor fabrication process including source/drain recessing and filling |
| JP4369359B2 (ja) | 2004-12-28 | 2009-11-18 | 富士通マイクロエレクトロニクス株式会社 | 半導体装置 |
| US7569443B2 (en) * | 2005-06-21 | 2009-08-04 | Intel Corporation | Complementary metal oxide semiconductor integrated circuit using raised source drain and replacement metal gate |
| JP2007165817A (ja) * | 2005-11-18 | 2007-06-28 | Sony Corp | 半導体装置およびその製造方法 |
| US8853746B2 (en) * | 2006-06-29 | 2014-10-07 | International Business Machines Corporation | CMOS devices with stressed channel regions, and methods for fabricating the same |
| US20080237634A1 (en) * | 2007-03-30 | 2008-10-02 | International Business Machines Corporation | Crystallographic recess etch for embedded semiconductor region |
-
2008
- 2008-10-10 US US12/249,570 patent/US7994014B2/en active Active
-
2009
- 2009-10-05 JP JP2011531097A patent/JP5785496B2/ja not_active Expired - Fee Related
- 2009-10-05 KR KR1020117010636A patent/KR101639771B1/ko not_active Expired - Fee Related
- 2009-10-05 CN CN200980141102.2A patent/CN102177573B/zh not_active Expired - Fee Related
- 2009-10-05 EP EP09807584A patent/EP2345065A2/en not_active Withdrawn
- 2009-10-05 WO PCT/US2009/059560 patent/WO2010051133A2/en not_active Ceased
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006024809A (ja) * | 2004-07-09 | 2006-01-26 | Renesas Technology Corp | 半導体装置及びその製造方法 |
| US20060289856A1 (en) | 2005-06-22 | 2006-12-28 | Fujitsu Limited | Semiconductor device and production method thereof |
| JP2008010871A (ja) * | 2006-06-29 | 2008-01-17 | Internatl Business Mach Corp <Ibm> | 傾斜側壁表面を備えたソース/ドレイン陥凹部を有するmosfetおよびこれを形成するための方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| EP2345065A2 (en) | 2011-07-20 |
| US7994014B2 (en) | 2011-08-09 |
| US20100090289A1 (en) | 2010-04-15 |
| CN102177573B (zh) | 2014-01-22 |
| WO2010051133A3 (en) | 2010-10-07 |
| KR20110091667A (ko) | 2011-08-12 |
| JP2012505547A (ja) | 2012-03-01 |
| JP5785496B2 (ja) | 2015-09-30 |
| CN102177573A (zh) | 2011-09-07 |
| WO2010051133A2 (en) | 2010-05-06 |
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