KR101635196B1 - 플래시 메모리소자에 정보 데이터를 기입할 때 기입 오류를 처리하기 위한 방법 및 장치 - Google Patents

플래시 메모리소자에 정보 데이터를 기입할 때 기입 오류를 처리하기 위한 방법 및 장치 Download PDF

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Publication number
KR101635196B1
KR101635196B1 KR1020100060107A KR20100060107A KR101635196B1 KR 101635196 B1 KR101635196 B1 KR 101635196B1 KR 1020100060107 A KR1020100060107 A KR 1020100060107A KR 20100060107 A KR20100060107 A KR 20100060107A KR 101635196 B1 KR101635196 B1 KR 101635196B1
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South Korea
Prior art keywords
memory
information data
bus
current
flash memory
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Expired - Fee Related
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KR1020100060107A
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English (en)
Korean (ko)
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KR20110001914A (ko
Inventor
토마스 브룬
마이클 드렉슬러
디터 하우프트
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톰슨 라이센싱
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14—Error detection or correction of the data by redundancy in operation
    • G06F11/1402—Saving, restoring, recovering or retrying
    • G06F11/1405—Saving, restoring, recovering or retrying at machine instruction level
    • G06F11/141—Saving, restoring, recovering or retrying at machine instruction level for bus or memory accesses
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023—Free address space management
    • G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72—Details relating to flash memory management
    • G06F2212/7209—Validity control, e.g. using flags, time stamps or sequence numbers
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Debugging And Monitoring (AREA)
  • Read Only Memory (AREA)
KR1020100060107A 2009-06-29 2010-06-24 플래시 메모리소자에 정보 데이터를 기입할 때 기입 오류를 처리하기 위한 방법 및 장치 Expired - Fee Related KR101635196B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP09305611.7 2009-06-29
EP09305611A EP2270662A1 (en) 2009-06-29 2009-06-29 Method and apparatus for dealing with write errors when writing information data into flash memory devices

Publications (2)

Publication Number Publication Date
KR20110001914A KR20110001914A (ko) 2011-01-06
KR101635196B1 true KR101635196B1 (ko) 2016-06-30

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KR1020100060107A Expired - Fee Related KR101635196B1 (ko) 2009-06-29 2010-06-24 플래시 메모리소자에 정보 데이터를 기입할 때 기입 오류를 처리하기 위한 방법 및 장치

Country Status (6)

Country Link
US (2) US8352780B2 (enExample)
EP (2) EP2270662A1 (enExample)
JP (1) JP5575555B2 (enExample)
KR (1) KR101635196B1 (enExample)
CN (1) CN101937719B (enExample)
TW (1) TWI503828B (enExample)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012230621A (ja) * 2011-04-27 2012-11-22 Sony Corp メモリ装置、メモリ制御装置、メモリ制御方法
JP2013058172A (ja) * 2011-09-09 2013-03-28 Toshiba Corp 映像収録再生装置、収録方法及び再構築方法
JP5800847B2 (ja) * 2013-03-26 2015-10-28 京セラドキュメントソリューションズ株式会社 情報処理装置、エラー処理方法
FR3077892B1 (fr) * 2018-02-15 2023-12-22 Idemia Système et procédé d'enregistrement d'une transaction associée à une mémoire non volatile orientée page
KR20230001182A (ko) 2021-06-28 2023-01-04 삼성전자주식회사 비휘발성 메모리 장치, 그것을 포함하는 저장 장치 및 그것의 동작 방법

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2007080031A1 (en) 2006-01-16 2007-07-19 Thomson Licensing Method and apparatus for recording high-speed input data into a matrix of memory devices
US20090037652A1 (en) 2003-12-02 2009-02-05 Super Talent Electronics Inc. Command Queuing Smart Storage Transfer Manager for Striping Data to Raw-NAND Flash Modules

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6134793A (ja) * 1984-07-27 1986-02-19 Hitachi Ltd ダイナミツクメモリ装置における診断及びエラ−訂正装置
JP2750704B2 (ja) * 1988-08-29 1998-05-13 日立マクセル株式会社 Ｉｃカードの情報書込み方式及びｉｃカード
JPH0433029A (ja) * 1990-05-24 1992-02-04 Matsushita Electric Ind Co Ltd メモリ装置とその駆動方法
JP4034947B2 (ja) * 2001-05-31 2008-01-16 株式会社ルネサステクノロジ 不揮発性記憶システム
JP2003006041A (ja) * 2001-06-20 2003-01-10 Hitachi Ltd 半導体装置
US8041879B2 (en) * 2005-02-18 2011-10-18 Sandisk Il Ltd Flash memory backup system and method
EP1712985A1 (en) * 2005-04-15 2006-10-18 Deutsche Thomson-Brandt Gmbh Method and system for storing logical data blocks into flash-blocks in multiple non-volatile memories which are connected to at least one common data I/O bus
EP1850347A1 (en) * 2006-04-28 2007-10-31 Deutsche Thomson-Brandt Gmbh Method and device for writing to a flash memory

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090037652A1 (en) 2003-12-02 2009-02-05 Super Talent Electronics Inc. Command Queuing Smart Storage Transfer Manager for Striping Data to Raw-NAND Flash Modules
WO2007080031A1 (en) 2006-01-16 2007-07-19 Thomson Licensing Method and apparatus for recording high-speed input data into a matrix of memory devices

Also Published As

Publication number Publication date
CN101937719A (zh) 2011-01-05
KR20110001914A (ko) 2011-01-06
US20130067272A1 (en) 2013-03-14
US8352780B2 (en) 2013-01-08
US8468384B2 (en) 2013-06-18
JP2011008790A (ja) 2011-01-13
CN101937719B (zh) 2014-12-31
EP2270663A1 (en) 2011-01-05
TWI503828B (zh) 2015-10-11
EP2270663B1 (en) 2016-03-16
JP5575555B2 (ja) 2014-08-20
EP2270662A1 (en) 2011-01-05
TW201101314A (en) 2011-01-01
US20100332891A1 (en) 2010-12-30

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