TWI503828B - 資訊資料書寫入快閃記憶體裝置內書寫錯誤之處理方法和裝置 - Google Patents

資訊資料書寫入快閃記憶體裝置內書寫錯誤之處理方法和裝置 Download PDF

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Publication number
TWI503828B
TWI503828B TW099118983A TW99118983A TWI503828B TW I503828 B TWI503828 B TW I503828B TW 099118983 A TW099118983 A TW 099118983A TW 99118983 A TW99118983 A TW 99118983A TW I503828 B TWI503828 B TW I503828B
Authority
TW
Taiwan
Prior art keywords
memory
information
bus
current
memory devices
Prior art date
Application number
TW099118983A
Other languages
English (en)
Chinese (zh)
Other versions
TW201101314A (en
Inventor
Thomas Brune
Michael Drexler
Dieter Haupt
Original Assignee
Thomson Licensing
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thomson Licensing filed Critical Thomson Licensing
Publication of TW201101314A publication Critical patent/TW201101314A/zh
Application granted granted Critical
Publication of TWI503828B publication Critical patent/TWI503828B/zh

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Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14Error detection or correction of the data by redundancy in operation
    • G06F11/1402Saving, restoring, recovering or retrying
    • G06F11/1405Saving, restoring, recovering or retrying at machine instruction level
    • G06F11/141Saving, restoring, recovering or retrying at machine instruction level for bus or memory accesses
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/0223User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023Free address space management
    • G06F12/0238Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G06F12/0246Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/72Details relating to flash memory management
    • G06F2212/7209Validity control, e.g. using flags, time stamps or sequence numbers
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70Masking faults in memories by using spares or by reconfiguring

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Debugging And Monitoring (AREA)
  • Read Only Memory (AREA)
TW099118983A 2009-06-29 2010-06-11 資訊資料書寫入快閃記憶體裝置內書寫錯誤之處理方法和裝置 TWI503828B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP09305611A EP2270662A1 (en) 2009-06-29 2009-06-29 Method and apparatus for dealing with write errors when writing information data into flash memory devices

Publications (2)

Publication Number Publication Date
TW201101314A TW201101314A (en) 2011-01-01
TWI503828B true TWI503828B (zh) 2015-10-11

Family

ID=41168619

Family Applications (1)

Application Number Title Priority Date Filing Date
TW099118983A TWI503828B (zh) 2009-06-29 2010-06-11 資訊資料書寫入快閃記憶體裝置內書寫錯誤之處理方法和裝置

Country Status (6)

Country Link
US (2) US8352780B2 (enExample)
EP (2) EP2270662A1 (enExample)
JP (1) JP5575555B2 (enExample)
KR (1) KR101635196B1 (enExample)
CN (1) CN101937719B (enExample)
TW (1) TWI503828B (enExample)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012230621A (ja) * 2011-04-27 2012-11-22 Sony Corp メモリ装置、メモリ制御装置、メモリ制御方法
JP2013058172A (ja) * 2011-09-09 2013-03-28 Toshiba Corp 映像収録再生装置、収録方法及び再構築方法
JP5800847B2 (ja) * 2013-03-26 2015-10-28 京セラドキュメントソリューションズ株式会社 情報処理装置、エラー処理方法
FR3077892B1 (fr) * 2018-02-15 2023-12-22 Idemia Système et procédé d'enregistrement d'une transaction associée à une mémoire non volatile orientée page
KR20230001182A (ko) 2021-06-28 2023-01-04 삼성전자주식회사 비휘발성 메모리 장치, 그것을 포함하는 저장 장치 및 그것의 동작 방법

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4694454A (en) * 1984-07-27 1987-09-15 Hitachi, Ltd. Dynamic memory diagnosis and error correction apparatus
WO2006108755A1 (en) * 2005-04-15 2006-10-19 Thomson Licensing Method and system for storing logical data blocks into flash-blocks in multiple non-volatile memories which are connected to at least one common data i/o bus
WO2007080031A1 (en) * 2006-01-16 2007-07-19 Thomson Licensing Method and apparatus for recording high-speed input data into a matrix of memory devices
US20090037652A1 (en) * 2003-12-02 2009-02-05 Super Talent Electronics Inc. Command Queuing Smart Storage Transfer Manager for Striping Data to Raw-NAND Flash Modules

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2750704B2 (ja) * 1988-08-29 1998-05-13 日立マクセル株式会社 Icカードの情報書込み方式及びicカード
JPH0433029A (ja) * 1990-05-24 1992-02-04 Matsushita Electric Ind Co Ltd メモリ装置とその駆動方法
JP4034947B2 (ja) * 2001-05-31 2008-01-16 株式会社ルネサステクノロジ 不揮発性記憶システム
JP2003006041A (ja) * 2001-06-20 2003-01-10 Hitachi Ltd 半導体装置
US8041879B2 (en) * 2005-02-18 2011-10-18 Sandisk Il Ltd Flash memory backup system and method
EP1850347A1 (en) * 2006-04-28 2007-10-31 Deutsche Thomson-Brandt Gmbh Method and device for writing to a flash memory

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4694454A (en) * 1984-07-27 1987-09-15 Hitachi, Ltd. Dynamic memory diagnosis and error correction apparatus
US20090037652A1 (en) * 2003-12-02 2009-02-05 Super Talent Electronics Inc. Command Queuing Smart Storage Transfer Manager for Striping Data to Raw-NAND Flash Modules
WO2006108755A1 (en) * 2005-04-15 2006-10-19 Thomson Licensing Method and system for storing logical data blocks into flash-blocks in multiple non-volatile memories which are connected to at least one common data i/o bus
US20090043948A1 (en) * 2005-04-15 2009-02-12 Thomson Licensing Llc Method and System for Storing Logical Data Blocks Into Flash-Blocks in Multiple Non-Volatile Memories Which Are Connected to At Least One Common Data I/0 Bus
WO2007080031A1 (en) * 2006-01-16 2007-07-19 Thomson Licensing Method and apparatus for recording high-speed input data into a matrix of memory devices
US20090083591A1 (en) * 2006-01-16 2009-03-26 Thomas Brune Method and Apparatus For Recording High-Speed Input Data Into a Matrix of Memory Devices

Also Published As

Publication number Publication date
KR101635196B1 (ko) 2016-06-30
EP2270663B1 (en) 2016-03-16
TW201101314A (en) 2011-01-01
CN101937719A (zh) 2011-01-05
US8352780B2 (en) 2013-01-08
CN101937719B (zh) 2014-12-31
US8468384B2 (en) 2013-06-18
JP2011008790A (ja) 2011-01-13
US20100332891A1 (en) 2010-12-30
JP5575555B2 (ja) 2014-08-20
EP2270663A1 (en) 2011-01-05
KR20110001914A (ko) 2011-01-06
EP2270662A1 (en) 2011-01-05
US20130067272A1 (en) 2013-03-14

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