FR3077892B1 - Système et procédé d'enregistrement d'une transaction associée à une mémoire non volatile orientée page - Google Patents
Système et procédé d'enregistrement d'une transaction associée à une mémoire non volatile orientée page Download PDFInfo
- Publication number
- FR3077892B1 FR3077892B1 FR1901332A FR1901332A FR3077892B1 FR 3077892 B1 FR3077892 B1 FR 3077892B1 FR 1901332 A FR1901332 A FR 1901332A FR 1901332 A FR1901332 A FR 1901332A FR 3077892 B1 FR3077892 B1 FR 3077892B1
- Authority
- FR
- France
- Prior art keywords
- page
- transaction
- recording
- oriented memory
- volatile
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/466—Transaction processing
- G06F9/467—Transactional memory
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/466—Transaction processing
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/14—Error detection or correction of the data by redundancy in operation
- G06F11/1402—Saving, restoring, recovering or retrying
- G06F11/1446—Point-in-time backing up or restoration of persistent data
- G06F11/1448—Management of the data involved in backup or backup restore
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/14—Error detection or correction of the data by redundancy in operation
- G06F11/1402—Saving, restoring, recovering or retrying
- G06F11/1446—Point-in-time backing up or restoration of persistent data
- G06F11/1458—Management of the backup or restore process
- G06F11/1466—Management of the backup or restore process to make the backup process non-disruptive
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/14—Error detection or correction of the data by redundancy in operation
- G06F11/1402—Saving, restoring, recovering or retrying
- G06F11/1446—Point-in-time backing up or restoration of persistent data
- G06F11/1458—Management of the backup or restore process
- G06F11/1469—Backup restoration techniques
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/10—Address translation
- G06F12/1009—Address translation using page tables, e.g. page table structures
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/4401—Bootstrapping
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/54—Interprogram communication
- G06F9/544—Buffers; Shared memory; Pipes
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/023—Free address space management
- G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
- G06F12/0246—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory in block erasable memory, e.g. flash memory
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/10—Providing a specific technical effect
- G06F2212/1016—Performance improvement
- G06F2212/1024—Latency reduction
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/10—Providing a specific technical effect
- G06F2212/1041—Resource optimization
- G06F2212/1044—Space efficiency improvement
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
- G06F2212/72—Details relating to flash memory management
- G06F2212/7203—Temporary buffering, e.g. using volatile buffer or dedicated buffer blocks
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Quality & Reliability (AREA)
- Computer Security & Cryptography (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Abstract
Système et procédé d'enregistrement d'une transaction associée à une mémoire non volatile orientée page. Un procédé d'enregistrement des transactions associées à une mémoire non volatile orientée page est décrit. Le procédé comprend l'identification des pages nécessitant une ou plusieurs mise(s) à jour pour la mise en œuvre d'une transaction définie. De plus, le procédé comprend la copie de la page dans un tampon non volatil. Le procédé comprend en outre la mise à jour de la page identifiée avec le contenu de la transaction. La transaction est validée si la page est mise à jour sans interruption sinon toute la transaction est annulée. Figure pour l’abrégé : Fig. 3
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IN201811005799 | 2018-02-15 | ||
IN201811005799 | 2018-02-15 |
Publications (2)
Publication Number | Publication Date |
---|---|
FR3077892A1 FR3077892A1 (fr) | 2019-08-16 |
FR3077892B1 true FR3077892B1 (fr) | 2023-12-22 |
Family
ID=67540900
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR1901332A Active FR3077892B1 (fr) | 2018-02-15 | 2019-02-11 | Système et procédé d'enregistrement d'une transaction associée à une mémoire non volatile orientée page |
Country Status (2)
Country | Link |
---|---|
US (1) | US11150940B2 (fr) |
FR (1) | FR3077892B1 (fr) |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7620660B2 (en) * | 2005-06-30 | 2009-11-17 | Microsoft Corporation | Pre-image logging for database recovery |
US9207876B2 (en) * | 2007-04-19 | 2015-12-08 | Microsoft Technology Licensing, Llc | Remove-on-delete technologies for solid state drive optimization |
EP2270662A1 (fr) * | 2009-06-29 | 2011-01-05 | Thomson Licensing | Procédé et appareil pour traiter des erreurs d'écriture lors de l'entrée de données d'information dans des dispositifs à mémoire flash |
US9519591B2 (en) * | 2013-06-22 | 2016-12-13 | Microsoft Technology Licensing, Llc | Latch-free, log-structured storage for multiple access methods |
-
2019
- 2019-02-11 FR FR1901332A patent/FR3077892B1/fr active Active
- 2019-02-13 US US16/274,853 patent/US11150940B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
US11150940B2 (en) | 2021-10-19 |
US20190250945A1 (en) | 2019-08-15 |
FR3077892A1 (fr) | 2019-08-16 |
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