KR101538083B1 - Semiconductor device structure - Google Patents

Semiconductor device structure Download PDF

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Publication number
KR101538083B1
KR101538083B1 KR1020120093190A KR20120093190A KR101538083B1 KR 101538083 B1 KR101538083 B1 KR 101538083B1 KR 1020120093190 A KR1020120093190 A KR 1020120093190A KR 20120093190 A KR20120093190 A KR 20120093190A KR 101538083 B1 KR101538083 B1 KR 101538083B1
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South Korea
Prior art keywords
light
semiconductor
encapsulant
electrodes
semiconductor device
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KR1020120093190A
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Korean (ko)
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KR20140026153A (en
Inventor
김창태
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주식회사 씨티랩
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Priority to KR1020120093190A priority Critical patent/KR101538083B1/en
Priority to PCT/KR2013/002883 priority patent/WO2013151391A1/en
Publication of KR20140026153A publication Critical patent/KR20140026153A/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/96—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/52—Encapsulations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/58—Optical field-shaping elements
    • H01L33/60—Reflective elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/568—Temporary substrate used as encapsulation process aid
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/19—Manufacturing methods of high density interconnect preforms
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/23—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
    • H01L2224/24—Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of an individual high density interconnect connector
    • H01L2224/241—Disposition
    • H01L2224/24135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/24137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge

Abstract

The present disclosure relates to a semiconductor device having two electrodes and being a flip chip type semiconductor light emitting device; A white insulating film which isolates the two electrodes to be exposed; Two external electrodes connected to the exposed two electrodes, respectively; An encapsulant comprising a white insulating film and two external electrodes placed on the bottom and encapsulating the semiconductor element and having a light transmitting property to the light generated from the flip chip type semiconductor light emitting element, To a semiconductor device structure.

Description

[0001] SEMICONDUCTOR DEVICE STRUCTURE [0002]

Disclosure relates generally to semiconductor device structures and methods of making same, and more particularly to semiconductor device structures that are simple to manufacture and methods of making same.

Examples of the excitation and semiconductor elements include semiconductor light emitting elements (e.g., laser diodes), semiconductor light receiving elements (e.g., photodiodes), pn junction diode electric elements, semiconductor transistors and the like. Representatively, a Group III nitride semiconductor light emitting element is exemplified . The III-nitride semiconductor light emitting device includes a compound semiconductor layer made of Al (x) Ga (y) In (1-xy) N (0? X? 1, 0? Y? 1, 0? X + Such as SiC, SiN, SiCN, and CN, but does not exclude the inclusion of a material or a semiconductor layer of these materials.

Herein, the background art relating to the present disclosure is provided, and these are not necessarily meant to be known arts.

FIG. 1 is a diagram showing a conventional semiconductor light emitting device. The semiconductor light emitting device includes a substrate 100, a buffer layer 200, a first semiconductor layer (not shown) having a first conductivity 300, an active layer 400 for generating light through recombination of electrons and holes, and a second semiconductor layer 500 having a second conductivity different from the first conductivity are sequentially deposited, A conductive film 600 and an electrode 700 serving as a bonding pad are formed on the first semiconductor layer 300. An electrode 800 serving as a bonding pad is formed on the exposed first semiconductor layer 300. [ Here, when the substrate 100 side is placed in the package, it functions as a mounting surface.

2 is a diagram showing another example of a conventional semiconductor light emitting device (Flip Chip). A semiconductor light emitting device includes a substrate 100 (e.g., a sapphire substrate), a first semiconductor layer having a first conductivity An active layer 400 (e.g., InGaN / (In) GaN MQWs) that generates light through recombination of electrons and holes, a second semiconductor layer 400 having a second conductivity different from the first conductivity, (Ag reflective film) 901 (for example, Ag reflective film) for reflecting light onto the substrate 100 side, and an electrode film 901 (for example, a p-type GaN layer) An electrode 800 (e.g., Cr / Ni / Au) functioning as a bonding pad is formed on the first semiconductor layer 300 exposed and etched to form an electrode film 903 (e.g., Au diffusion layer) Laminated metal pads) are formed. Here, when the electrode film 903 side is placed in the package, it functions as a mounting surface. Flip chip or junction down type chips shown in FIG. 2 are superior to the lateral chips shown in FIG. 1 in heat radiation efficiency in terms of heat emission efficiency. The lateral chip must emit heat through the sapphire substrate 100 having a thickness of 80 to 180 mu m while the flip chip emits heat through the metal electrodes 901, 902 and 903 located close to the active layer 400 Because it can emit.

15 is a diagram illustrating a conventional semiconductor light emitting device package or a semiconductor light emitting device structure. The semiconductor light emitting device package includes lead frames 110 and 120, a mold 130, and a vertical semiconductor light emitting device Emitting chip, and the cavity 140 is filled with an encapsulant 170 containing the fluorescent material 160. The encapsulant 170 may be a light-emitting chip. The lower surface of the vertical semiconductor light emitting device 150 is electrically connected to the lead frame 110 and the upper surface thereof is electrically connected to the lead frame 120 by the wire 180. A part of the light (for example, blue light) emitted from the vertical type semiconductor light emitting device 150 excites the phosphor 160 so that the phosphor 160 makes light (for example, yellow light), and these lights (blue light + Make white light. In this case, the mold 130, the encapsulant 170, the lead frames 110 and 120, the mold 130, and the encapsulant 170 carry the vertical semiconductor light emitting device, Carrier).

This will be described later in the Specification for Implementation of the Invention.

SUMMARY OF THE INVENTION Herein, a general summary of the present disclosure is provided, which should not be construed as limiting the scope of the present disclosure. of its features).

According to one aspect of the present disclosure, there is provided a semiconductor device having two electrodes and being a flip-chip type semiconductor light emitting device; A white insulating film which isolates the two electrodes to be exposed; Two external electrodes connected to each of the two exposed electrodes; An encapsulant comprising a white insulating film and two external electrodes placed on the bottom and encapsulating the semiconductor element and having a light transmitting property to the light generated from the flip chip type semiconductor light emitting element, A semiconductor device structure is provided.

This will be described later in the Specification for Implementation of the Invention.

1 is a view showing an example of a conventional semiconductor light emitting device (lateral chip)
2 is a view showing another example (Flip Chip) of a conventional semiconductor light emitting device,
Figure 3 shows an example of a method of manufacturing a semiconductor device structure in accordance with the present disclosure;
4 is a diagram illustrating an example of a method for manufacturing a flip chip package in accordance with the present disclosure;
5 is a diagram illustrating another example of a method of manufacturing a semiconductor device structure according to the present disclosure,
6 is a diagram illustrating an example of a semiconductor device structure according to the present disclosure;
7 is a diagram illustrating another example of a method of manufacturing a semiconductor device structure according to the present disclosure;
8 is a view showing another example of a semiconductor device structure according to the present disclosure,
9 is a diagram illustrating an example of the use of a semiconductor device structure in accordance with the present disclosure;
10 is a diagram illustrating another example of a method of manufacturing a semiconductor device structure according to the present disclosure;
11 is a diagram showing another example of a semiconductor device structure according to the present disclosure,
12 is a diagram showing another example of the semiconductor device structure according to the present disclosure,
13 is a diagram showing another example of a semiconductor device structure according to the present disclosure,
14 is a diagram showing another example of a semiconductor device structure according to the present disclosure,
15 is a view showing an example of a conventional semiconductor light emitting device package or a semiconductor light emitting device structure,
16 is a view showing another example of the semiconductor device structure according to the present disclosure,
17 is a view showing an example of a method of manufacturing the semiconductor device structure shown in FIG. 16,
FIGS. 18 and 19 are views showing examples of reflective surfaces according to the present disclosure;
Figs. 20 and 21 are diagrams for explaining the principle of formation of a reflection surface according to the present disclosure,
22 is a view showing an example of an overall shape of an encapsulant according to the present disclosure,
23 illustrates another example of a semiconductor device structure according to the present disclosure;

The present disclosure will now be described in detail with reference to the accompanying drawings.

3 is a diagram showing an example of a method of manufacturing a semiconductor device structure according to the present disclosure. After a plate 1 is prepared, a semiconductor element 2 provided with two electrodes 80 and 90 is bonded to an adhesive 3 ) Is fixed to the plate (1). Next, the encapsulating material (4) is used to wrap the semiconductor element (2). Next, the plate 1 and the semiconductor element 2 are separated. The material constituting the plate 1 is not particularly limited, and a material such as sapphire may be used, or a flat flat structure such as a metal or glass may be used. There is no particular limitation on the material forming the adhesive 3, and any adhesive may be used as long as it can fix the semiconductor element 2 to the plate 1 only. As the material forming the sealing agent 3, a silicone epoxy conventionally used in an LED package can be used. After the sealing agent 4 is formed, separation between the semiconductor element 2 and the plate 1 can be performed by applying heat to melt the adhesive 3 or by using a solvent capable of melting the adhesive 3. It is also possible to use heat and solvent together. It is also possible to use an adhesive tape. The encapsulant 4 may be formed by conventional methods such as dispensing, screen printing, molding, and spin coating. Alternatively, the encapsulant 4 may be formed by applying a photo-curing resin (UV curable resin) Do. In the case where a translucent plate such as sapphire is used for the plate 1, it is also possible to irradiate light from the plate 1 side. For the sake of explanation, one semiconductor element 2 is shown on the plate 1, but a plurality of semiconductor elements 2 can be placed on the plate 1 to carry out a process. Although the semiconductor element 2 has been described as having two electrodes 80 and 90, the number of the semiconductor elements 2 is not particularly limited. For example, in the case of a transistor, it can have three electrodes.

Fig. 4 is a diagram showing an example of a method for manufacturing a flip chip package according to the present disclosure. As a semiconductor element 2, a junction down type chip is presented. As a junction down type chip, a flip chip type semiconductor light emitting element as shown in Fig. 2 can be exemplified. 2, a semiconductor light emitting device includes a first semiconductor layer 300 (e.g., an n-type GaN layer) having a first conductivity, a first semiconductor layer 300 having a first conductivity An active layer 400 (e.g., InGaN / (In) GaN MQWs) that generates light through recombination of a first conductivity and a second semiconductor layer 500 (e.g., a p-type GaN layer) (For example, an Ag reflective film), an electrode film 902 (for example, a Ni diffusion preventing film), and an electrode film 903 (for example, Au bonding layer) is formed on the first semiconductor layer 300 and an electrode 800 (e.g., Cr / Ni / Au laminated metal pad) functioning as a bonding pad is formed on the first semiconductor layer 300 exposed and etched. The semiconductor device 2 has two electrodes 80 and 90. The electrode 90 may have the same structure as the electrodes 901, 902 and 903 of FIG. 2, or may be a combination of DBR (Distributed Bragg Reflector) It is also good. The electrode 80 and the electrode 90 are electrically insulated by an insulating film 5 such as SiO 2 . The subsequent process is the same, and the encapsulating material 4 is used to wrap the semiconductor element 2. Next, the semiconductor element 2 is separated from the plate 1 and the adhesive 3.

5 is a diagram showing another example of a method of manufacturing a semiconductor device structure according to the present disclosure. A plurality of semiconductor elements 2, 2 are integrally covered with a sealing agent 4 on a plate 1. After the plate 1 is removed, it becomes easy to package the semiconductor elements 2, 2 integrally. A method of electrically connecting the semiconductor element 2 and the semiconductor element 2 will be described later. It is also possible to separate them into individual semiconductor elements 2 as in Fig. This is possible by separating the plurality of semiconductor elements 2, 2 from the plate 1, and then individualizing them through a process such as sawing. By using the sealing agent 4 having softness after curing, bonding with the flexible circuit board can be further enhanced.

6 is a view showing an example of a semiconductor element structure according to the present disclosure, in which the side surface 4a of the sealing agent 4 is formed to be inclined. In the case where the semiconductor element 2 is a light emitting element, the sealing agent 4 has various angular outer surfaces, so that light extraction efficiency to the outside of the package becomes high. During screen printing, the side wall 4a can be formed by inclining the screen bulkhead, and the side surface 4a can be formed by using a sharp-pointed cutter at the time of cutting.

7 shows another example of a method of manufacturing a semiconductor device structure according to the present disclosure. After the plate 1 is removed, an insulating film 6 such as SiO 2 is formed on the electrode 80 and the electrode 90, As shown in FIG. Thereafter, the external electrode 81 is connected to the electrode 80, and the external electrode 91 is formed on the electrode 90, so that the structure of the conventional package can be obtained. The external electrodes 81 and 91 may correspond to the lead frame of the conventional package. It is also possible to spread the external electrodes 81 and 91 widely to function as a reflective film. The insulating film 6 may have merely an insulating function or alternatively may have a laminated structure of SiO 2 / TiO 2 or DBR so as to reduce light absorption by the external electrodes 81 and 91. When the semiconductor element 2 includes the insulating film 5 as shown in FIG. 4, the insulating film 6 may be omitted. The deposition process and the photolithography process used for forming the insulating film 6 and the external electrodes 81 and 91 are generally used in a semiconductor chip process and are well known to those skilled in the art. By providing the external electrodes 81 and 91, mounting to the PCB, COB, and the like can be facilitated. It is also possible to provide only the insulating film 6 without the external electrodes 81 and 91, if necessary. The insulating film 6 can function not only to protect between the semiconductor element 2 and the encapsulating agent 4 but also to protect the encapsulating agent 4 from the step of forming the external electrodes 81 and 91. [ Further, the insulating film 6 may be formed of a white material so that the insulating film 6 functions as a reflecting film. For example, a white PSR (Photo Slider Regist) can be used as the insulating film 6 or coated.

FIG. 8 is a view showing another example of the semiconductor device structure according to the present disclosure, and includes a semiconductor device 2A and a semiconductor device 2B electrically connected in series. This configuration is possible by connecting the negative (-) electrode 80A of the semiconductor element 2A and the positive (+) electrode 90B of the semiconductor element 2B through the external electrode 89. Reference numeral 4 denotes an encapsulant; 6, an insulating film; 90A, a positive electrode of the semiconductor element 2A; and 80B, a negative electrode of the semiconductor element 2B. With this configuration, the electrical connection between the integrated semiconductor elements 2A and 2B can be formed through the sealing agent 4 without using the monolithic substrate. In the case of a monolithic substrate, the structure of the semiconductor element thereon is the same, but according to the method of the present disclosure, the semiconductor element 2A and the semiconductor element 2B do not have to be the same function elements. It goes without saying that the semiconductor devices 2A and 2B can be connected in parallel. In addition, the side surface 4a of the encapsulant 4 can be inclined as shown in FIG. 6, and this configuration enables a high-voltage semiconductor light emitting device package or a semiconductor light emitting device structure that can not be imagined .

9A and 9B show an example of the use of the semiconductor device structure according to the present disclosure. In the semiconductor device 2C, the lead wire 7a of the printed circuit board 7 and the electrodes 80 and 90 are directly connected, The element 2D is connected to the lead wire 7b through the external electrodes 81 and 91. The printed circuit board 7 may be a flexible circuit board.

Fig. 10 is a view showing another example of a method of manufacturing a semiconductor device structure according to the present disclosure. Fig. 10 is a view showing another example of a method of manufacturing a semiconductor device structure according to the present disclosure, A first semiconductor layer 300 having a first conductivity, an active layer 400 generating light through recombination of electrons and holes, a second semiconductor layer having a second conductivity different from the first conductivity, (500) are grown, and electrodes (80, 90) are formed. The semiconductor element 2 is attached to the plate 1 using the adhesive 3 and then the substrate 100 is removed prior to covering with the encapsulating agent 4. The rough surface 301 are formed. The subsequent process is the same. The removal of the substrate 100 is possible by a process such as laser lift-off and the rough surface 301 is possible by dry etching such as ICP (Inductively Coupled Plasma). This enables chip-level laser lift-off.

11 shows another example of the semiconductor device structure according to the present disclosure, in which the encapsulant 4 contains a phosphor. YAG, Silicate, Nitride fluorescent material or the like can be used to emit light of a desired color.

12 shows another example of the semiconductor element structure according to the present disclosure, in which a phosphor layer 8 is formed in the encapsulating agent 4 or in the lower part of the encapsulating agent 4. [ This can be formed by depositing the phosphor in the encapsulating agent 4, spin coating it separately, applying the phosphor contained in the volatile liquid, volatilizing it, leaving only the phosphor, and covering it with the encapsulating agent 4. It is possible to form a plurality of phosphor layers 8 as required.

13 shows another example of the semiconductor device structure according to the present disclosure, in which a rough surface 4g for enhancing the light extraction efficiency is formed in the encapsulating material 4. As shown in Fig. The rough surface 4g can be formed by pressing, forming a nanoimprint, or the like. It is also possible to apply the bead material by a method such as etching, sand blasting or the like.

Fig. 14 is a diagram showing another example of the semiconductor element structure according to the present disclosure, in which the encapsulation agent 4 is provided with a lens 4c. Preferably, the lens 4c is formed integrally with the sealing agent. Such an integral type lens 4c can be formed by a method such as compression molding.

16 is a view showing another example of the semiconductor element structure according to the present disclosure in which the semiconductor element 2 is a flip chip type semiconductor light emitting element as shown in Fig. 4, and the side faces 4a ) Has a light reflecting surface 4b for reflecting upward the light generated in the active layer 400 (see FIG. 2). The light reflecting surface 4b may be formed on the entire side surface 4a or on a part thereof. Preferably at the bottom of the side surface 4a where the semiconductor element 2 is located. In FIG. 16, it is preferable that the upper portion 4e of the side surface 4a on which the light reflecting surface 4b is not formed has a height above a certain level. The upper portion 4e may have a direction perpendicular to the flat upper surface 4d, and an example of the entire shape of the upper portion 4e is shown in Fig. The upper portion 4e is provided at a predetermined height or higher so that the semiconductor device structure can be used as a light source of a beam projector without a separate lens. In Fig. 16, the light reflecting surface 4b is a curved surface, and Figs. 18 and 19 show another example of the light reflecting surface 4b. In Fig. 18, the straight inclined faces 4b1 and 4b2, which are different in two inclination, form a reflecting surface. In Fig. 19, the side surface 4a on which the step 4b3 is formed on the inclined surface 4b1 is provided. It is also possible to introduce the slope 4b1 and the step 4b3 plural times. The principle of the light reflecting surface 4b will be described with reference to FIGS. 20 and 21. FIG. The side surface 4a shown in Fig. 6 can also be regarded as one of the reflecting surfaces. The description of the same reference numerals will be omitted. The phosphor 8 is not necessarily provided and may be conformally coated as shown in Fig. 16 or may be contained in the entire encapsulant 4 as shown in Fig. 11, or only part of the encapsulant 4 . When the insulating film 6 and the external electrodes 81 and 91 are provided, they are formed on the entire surface of the encapsulant 4 on the electrodes 80 and 90 side and then removed in the stitching process by a blade 41 And may not be formed in the region where the light reflecting surface 4b is previously formed.

17 is a view showing an example of a method for manufacturing the semiconductor device structure shown in FIG. 16, which is basically the same as the process described with reference to FIGS. 4 to 6, except that the semiconductor devices 2c, The semiconductor element 2 is separated and the side surface 4a is formed by using the blade 41 having the shape of the light reflection surface 4b and the top 4e in the process of forming the side surface 4a . The inclined surfaces 4b1 and 4b2 shown in Fig. 18 can be formed by using blades having two different angles, and the inclined surface 4b1 and the stepped portion 4b3 shown in Fig. 19 are formed in a shape corresponding to the stepped portion 4b3 And a blade corresponding to the slope 4b1. By using machining such as sawing, the side surface 4a or the light reflecting surface 4b can be formed accurately in a desired shape. 15, it is almost impossible to control the contour of the encapsulant 170 at a level equal to or more than um (for example, when dispensing the encapsulant in the COB). However, According to the method according to the present invention, this is facilitated. Also, in the conventional package, a mold is required to have the shape of the lens 4c as shown in FIG. 14, but with the method according to the present disclosure, the light reflecting surface 4b can be formed without the help of such a mold.

Figs. 20 and 21 are diagrams for explaining the principle of formation of a reflective surface according to the present disclosure. In the case where light L1 is incident on a vertical side surface 4a from a light source S, When entering into the triangle C1 to be displayed, a medium having a refractive index that passes through a vertical side surface 4a where the refractive index is the boundary between a high medium (for example, the encapsulating agent 4) and a medium having a low refractive index Go ahead. However, when the angle of incidence of the light L1 is large, the light is reflected by the vertical side surface 4a and is directed to the top surface 4d. Similarly, the same principle is applied to the top surface 4d. On the other hand, in the case of the light reflecting surface 4b which is inclined to the right with respect to the vertical side surface 4a, the incident angle with respect to the vertical side surface 4a is smaller than the triangle C1, The light L2 can be reflected to the upper surface 4d side. When the light reflecting surface 4b is a curved surface, the same principle applies to the tangent to each point in the light reflecting surface 4b. With this application, the light reflection surface 4b can be constituted by a straight line, a parabola, an arc, etc., and a combination of these can be used if they can be manufactured. Preferably, the light reflecting surface 4b can be configured to reflect all the light incident on the light reflecting surface 4b to the top surface 4d, but this is not essential. More preferably, the light reflecting surface 4b is designed such that the light L2 reflected by the light reflecting surface 4b can be incident into the triangle C3 of the upper surface 4d. Such a design is well known to those skilled in the art of optics. As shown in Fig. 21, the light reflection surface 4b is made to be smaller than the incident angle [theta] 1 in the case where the light L is reflected by the side surface 4a perpendicular to the top surface 4d, , And the incident angle [theta] 2 when the light is directed to the upper surface 4d becomes smaller. The probability that the incident angle is reduced through the upper surface 4d of the sea becomes higher.

In the case where the semiconductor element 2 is a light emitting element, by providing the light reflecting surface 4b and / or the white insulating film 6, it is possible to greatly increase the light extraction efficiency to the upper surface 4d or above the semiconductor element 2 . 15, a white mold 130 is used, and the mold 130 implements the shape of the entire package and provides the cavity 140, while the light in the cavity 140 Reflection function. In the present disclosure, the function of reflecting light by the white mold 130 is replaced by the light reflecting surface 4b (using the difference in the refractive index between the encapsulating agent 4b and the outside), the white insulating film 6, Is distinguished from the white mold 13 in its position and function. The provision of such a light reflecting surface 4b and the provision of the white insulating film 6 are caused by a unique method of the manufacturing method according to the present disclosure.

23 is a view showing still another example of the semiconductor element structure according to the present disclosure in which the semiconductor element 2a and the second semiconductor element 2b are integrally formed by the sealing agent 4. [ A groove 4f is formed between the semiconductor element 2a and the second semiconductor element 2b and the groove 4f may have various shapes such as a slit. The groove 4f serves to separate and integrate the semiconductor element 2a and the second semiconductor element 2b and prevents the function of the semiconductor element 2a and the function of the second semiconductor element 2b from unnecessarily interfering . ≪ / RTI > It is not necessary that the semiconductor element 2a and the second semiconductor element 2b are elements having the same function. For example, one may be a functional element and one may be a zener diode for anti-static. It goes without saying that when the semiconductor element 2a and the second semiconductor element 2b are light emitting elements, the semiconductor element 2a and the second semiconductor element 2b can emit light of different colors, respectively. In the case where the semiconductor element 2a and the second semiconductor element 2b are light emitting elements, the groove 4f serves to form the light reflecting surface 4b. By forming the grooves 4f with the light reflection surface 4b, the semiconductor element 2a and the second semiconductor element 2b can emit light to the respective upper surfaces 4d without interfering with each other. The formation of the grooves 4f is possible by using a blade having a depth which does not cut the whole of the sealing agent 4. The light reflecting surface 4b may be formed only on one semiconductor element 2a.

Various embodiments of the present disclosure will be described below.

(1) A semiconductor device structure in which an encapsulant acts as a carrier.

(2) A semiconductor device structure having an encapsulation bottom separated from a plate.

(3) A semiconductor device structure in which outer surfaces of an encapsulant constitute an outer surface of a structure or a package, excluding a surface where electrodes of the semiconductor device are located.

(4) A semiconductor device structure in which semiconductor elements are combined using an encapsulant.

(5) A method of manufacturing a semiconductor device structure, comprising the steps of: positioning a semiconductor device on a plate; positioning the electrode of the semiconductor device so as to face the plate; Covering the semiconductor element with an encapsulating material; And separating the encapsulant-covered semiconductor element from the plate. ≪ RTI ID = 0.0 > 11. < / RTI >

(6) A method of manufacturing a semiconductor device structure, comprising: positioning a semiconductor device on a plate, wherein the semiconductor device is a flip-chip type semiconductor light emitting device and fixing the two electrodes of the semiconductor device so as to face the plate (The vertical direction is defined as a vertical direction and the horizontal direction is defined as a horizontal direction in the path of light generated in the semiconductor light emitting device); Covering the semiconductor element with an encapsulating material; Separating the encapsulant-covered semiconductor element from the plate; Forming a light reflection surface on the side surface of the encapsulant for reflecting the light generated from the flip chip type semiconductor light emitting device to the upper surface of the encapsulant, wherein the light reflection surface is formed by a light reflected by the side surface of the encapsulant, And forming an encapsulant on the upper surface of the encapsulant with an incident angle smaller than an angle of incidence on the upper surface of the encapsulant.

(7) A method of manufacturing a semiconductor device structure, wherein the light reflecting surface includes a curved surface. A curved surface may be a curved surface of a single curvature, a curved surface having a plurality of curvatures, a continuous curved surface, an intermittent curved surface, or the like. The light reflecting surface may be composed of a total reflection surface.

(8) A method of manufacturing a semiconductor device structure, wherein the light reflecting surface includes at least one straight inclined surface. The semiconductor device structure shown in Figs. 6, 18, and 19 belongs to this example.

(9) A method of manufacturing a semiconductor device structure, wherein the light reflecting surface includes a step in a horizontal direction on at least one straight inclined surface.

(10) The method of manufacturing a semiconductor device structure according to any one of the preceding claims, further comprising forming an encapsulation side upper portion extending in the vertical direction on the encapsulation side surface on the light reflecting surface in the step of forming the light reflecting surface.

(11) A method of manufacturing a semiconductor device structure, wherein the light reflecting surface is machined by a blade having a light reflecting surface shape.

(12) after the step of separating, forming an insulating film so that the two electrodes are exposed.

(13) A method of manufacturing a semiconductor device structure, wherein the insulating film is a white insulating film.

And forming two external electrodes electrically connected to each of the two electrodes after the separating step (14).

(15) forming two external electrodes electrically connected to each of the two electrodes exposed through the insulating film after the step of forming the insulating film.

(16) In the step of fixing the position, a plurality of semiconductor elements are fixed on the plate, and in the covering step, a plurality of semiconductor elements are covered with the sealing agent, and in the step of forming the light reflection surface, And wherein a groove is formed between two adjacent semiconductor elements.

(17) A semiconductor device having two electrodes and being a flip chip type semiconductor light emitting device; A white insulating film which isolates the two electrodes to be exposed; Two external electrodes connected to the exposed two electrodes, respectively; An encapsulant comprising a white insulating film and two external electrodes placed on the bottom and encapsulating the semiconductor element and having a light transmitting property to the light generated from the flip chip type semiconductor light emitting element, ≪ / RTI > By using a white insulating film, light reflection efficiency can be enhanced and light absorption by the external electrode can be prevented.

(18) The semiconductor device structure according to any one of (18) to (18), wherein the sealing agent contains a phosphor.

(19) The semiconductor device structure according to any one of the preceding claims, wherein the sealing agent has a top surface of a rough surface. An embodiment is shown in Fig.

(20) The encapsulant has an upper surface with a lens. An embodiment is shown in Fig.

And a light reflecting surface for reflecting the light generated from the flip chip type semiconductor light emitting device to the upper surface of the encapsulant. An embodiment is shown in Fig.

(22) The semiconductor device structure according to any one of the preceding claims, wherein the light reflecting surface is formed along the side surface of the sealing material from the white insulating film. As shown in FIG. 16, by forming the white insulating film 6 and the light reflecting surface 4b in succession, the emission efficiency can be further increased by the upper surface 4d of the light. It goes without saying that the insulating film 6 may be formed at a distance from the light reflecting surface 4b, as shown in Fig.

(23) A method of manufacturing a semiconductor device structure, wherein the light reflecting surface includes a curved surface.

(24) The method of manufacturing a semiconductor device structure according to any of the preceding claims, wherein the light reflecting surface comprises at least one straight inclined surface.

(25) The method of manufacturing a semiconductor device structure according to any one of the preceding claims, wherein the light reflecting surface includes a horizontal step on at least one straight inclined surface.

(26) The method of manufacturing a semiconductor device structure according to any one of the preceding claims, further comprising forming an encapsulation side upper portion extending in a vertical direction on the encapsulation side surface on the light reflecting surface in the step of forming the light reflecting surface.

(27) a first semiconductor element and a second semiconductor element, each of the first semiconductor element and the second semiconductor element having at least two electrodes; An encapsulant for covering and integrating a first semiconductor element and a second semiconductor element on opposite sides of at least two electrodes, characterized in that a groove is formed between the first semiconductor element and the second semiconductor element on at least two electrode sides ≪ / RTI >

The method of manufacturing a semiconductor device structure according to the present disclosure makes it possible to easily manufacture a semiconductor device structure or a package.

Also, the method of fabricating another semiconductor device structure according to the present disclosure makes it possible to fabricate a structure or package in which the encapsulant acts as a carrier.

Further, according to another method of manufacturing a semiconductor device structure according to the present disclosure, a light emitting device structure or a package in which a transparent encapsulant serves as a carrier can be manufactured.

Further, according to another method of manufacturing a semiconductor device structure according to the present disclosure, a plurality of semiconductor devices can be easily electrically connected.

In addition, according to the method of manufacturing another semiconductor device structure according to the present disclosure, semiconductor devices of different structures can be easily electrically connected.

100: substrate 200: buffer layer 300, 400, 500: semiconductor layer

Claims (10)

A semiconductor element which has two electrodes and is a flip chip type semiconductor light emitting element;
A white insulating film for insulating the two electrodes from each other and reflecting light from the semiconductor light emitting device;
Two external electrodes connected to each of the two exposed electrodes; And,
An encapsulant comprising a white insulating film and two external electrodes on the bottom and encapsulating the semiconductor element and having a light transmitting property with respect to the light generated in the flip chip type semiconductor light emitting device, In addition,
Wherein the white insulating film is formed so as to cover the sealing material from the two electrodes. The method according to claim 1,
Wherein the encapsulant contains a phosphor. The method according to claim 1,
Wherein the encapsulant has a top surface with a rough surface. The method according to claim 1,
Wherein the encapsulant has an upper surface with a lens. The method according to claim 1,
And a light reflecting surface for reflecting the light generated from the flip chip type semiconductor light emitting device to the upper surface of the encapsulant. The method of claim 5,
Wherein the light reflecting surface is formed along the side surface of the sealing agent from the white insulating film. The method of claim 5,
Wherein the light reflecting surface includes a curved surface. The method of claim 5,
RTI ID = 0.0 > 1, < / RTI > wherein the light reflecting surface comprises at least one straight inclined surface. The method of claim 5,
Wherein the light reflection surface comprises a step in the horizontal direction on at least one straight sloped surface. The method of claim 5,
Wherein the step of forming the light reflection surface further forms an upper portion of the encapsulation side extending in the vertical direction on the encapsulation side surface on the light reflection surface.
KR1020120093190A 2012-04-06 2012-08-24 Semiconductor device structure KR101538083B1 (en)

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PCT/KR2013/002883 WO2013151391A1 (en) 2012-04-06 2013-04-05 Method for manufacturing semiconductor device structure, and semiconductor device structure using same

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006024615A (en) * 2004-07-06 2006-01-26 Matsushita Electric Ind Co Ltd Led lighting source and manufacturing method thereof
KR20080056925A (en) * 2006-12-19 2008-06-24 엘지전자 주식회사 Led package and method of manufacturing the same
KR20100060867A (en) * 2008-11-28 2010-06-07 삼성전기주식회사 Method of manufacturing wafer level package
KR20120002130A (en) * 2010-06-30 2012-01-05 서울옵토디바이스주식회사 Flip-chip light-emitting device and method of manufacturing the same

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006024615A (en) * 2004-07-06 2006-01-26 Matsushita Electric Ind Co Ltd Led lighting source and manufacturing method thereof
KR20080056925A (en) * 2006-12-19 2008-06-24 엘지전자 주식회사 Led package and method of manufacturing the same
KR20100060867A (en) * 2008-11-28 2010-06-07 삼성전기주식회사 Method of manufacturing wafer level package
KR20120002130A (en) * 2010-06-30 2012-01-05 서울옵토디바이스주식회사 Flip-chip light-emitting device and method of manufacturing the same

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