KR101521254B1 - 이중으로 몰딩된 다중칩 패키지 시스템 - Google Patents

이중으로 몰딩된 다중칩 패키지 시스템 Download PDF

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Publication number
KR101521254B1
KR101521254B1 KR1020070140692A KR20070140692A KR101521254B1 KR 101521254 B1 KR101521254 B1 KR 101521254B1 KR 1020070140692 A KR1020070140692 A KR 1020070140692A KR 20070140692 A KR20070140692 A KR 20070140692A KR 101521254 B1 KR101521254 B1 KR 101521254B1
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South Korea
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integrated circuit
capsule
circuit die
package system
semiconductor device
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KR1020070140692A
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English (en)
Korean (ko)
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KR20080063197A (ko
Inventor
캄브함파티 라마크리슈나
심일권
셍 관 초우
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스태츠 칩팩 엘티디
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Assigned to 주식회사 한국씨티은행 reassignment 주식회사 한국씨티은행 근질권설정등록 Assignors: 스태츠 칩팩 피티이. 엘티디.
Assigned to 제이시이티 세미컨덕터 (샤옥싱) 코., 엘티디. reassignment 제이시이티 세미컨덕터 (샤옥싱) 코., 엘티디. 권리의 전부이전등록 Assignors: 스태츠 칩팩 피티이. 엘티디.
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/114—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations
    • H10W74/117—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations the substrate having spherical bumps for external connection
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/479—Leadframes on or in insulating or insulated package substrates, interposers, or redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/611—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
    • H10W70/614—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together the multiple chips being integrally enclosed
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/0198—Manufacture or treatment batch processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H10W74/014—Manufacture or treatment using batch processing
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H10W74/019—Manufacture or treatment using temporary auxiliary substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/121—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by multiple encapsulations, e.g. by a thin protective coating and a thick encapsulation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/241—Dispositions, e.g. layouts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/533—Cross-sectional shape
    • H10W72/534—Cross-sectional shape being rectangular
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/10—Configurations of laterally-adjacent chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
KR1020070140692A 2006-12-30 2007-12-28 이중으로 몰딩된 다중칩 패키지 시스템 Active KR101521254B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/618,806 US8178982B2 (en) 2006-12-30 2006-12-30 Dual molded multi-chip package system
US11/618,806 2006-12-30

Publications (2)

Publication Number Publication Date
KR20080063197A KR20080063197A (ko) 2008-07-03
KR101521254B1 true KR101521254B1 (ko) 2015-05-18

Family

ID=39582767

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020070140692A Active KR101521254B1 (ko) 2006-12-30 2007-12-28 이중으로 몰딩된 다중칩 패키지 시스템

Country Status (4)

Country Link
US (2) US8178982B2 (https=)
JP (1) JP5348632B2 (https=)
KR (1) KR101521254B1 (https=)
TW (1) TWI441265B (https=)

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TW200802751A (en) * 2005-11-01 2008-01-01 Koninkl Philips Electronics Nv An air cavity package for a semiconductor die and methods of forming the air cavity package
US8178982B2 (en) 2006-12-30 2012-05-15 Stats Chippac Ltd. Dual molded multi-chip package system
TWI360207B (en) 2007-10-22 2012-03-11 Advanced Semiconductor Eng Chip package structure and method of manufacturing
US7888184B2 (en) * 2008-06-20 2011-02-15 Stats Chippac Ltd. Integrated circuit packaging system with embedded circuitry and post, and method of manufacture thereof
US8076786B2 (en) * 2008-07-11 2011-12-13 Advanced Semiconductor Engineering, Inc. Semiconductor package and method for packaging a semiconductor package
US7842542B2 (en) 2008-07-14 2010-11-30 Stats Chippac, Ltd. Embedded semiconductor die package and method of making the same using metal frame carrier
US7993941B2 (en) 2008-12-05 2011-08-09 Stats Chippac, Ltd. Semiconductor package and method of forming Z-direction conductive posts embedded in structurally protective encapsulant
US8354304B2 (en) 2008-12-05 2013-01-15 Stats Chippac, Ltd. Semiconductor device and method of forming conductive posts embedded in photosensitive encapsulant
JP5238523B2 (ja) 2009-01-13 2013-07-17 株式会社日立国際電気 動画像符号化装置、動画像復号化装置、および、動画像復号化方法
US8003445B2 (en) * 2009-03-26 2011-08-23 Stats Chippac Ltd. Integrated circuit packaging system with z-interconnects having traces and method of manufacture thereof
US8569894B2 (en) 2010-01-13 2013-10-29 Advanced Semiconductor Engineering, Inc. Semiconductor package with single sided substrate design and manufacturing methods thereof
TWI411075B (zh) 2010-03-22 2013-10-01 日月光半導體製造股份有限公司 半導體封裝件及其製造方法
US8409978B2 (en) 2010-06-24 2013-04-02 Stats Chippac, Ltd. Semiconductor device and method of forming vertically offset bond on trace interconnect structure on leadframe
US8598709B2 (en) * 2010-08-31 2013-12-03 Infineon Technologies Ag Method and system for routing electrical connections of semiconductor chips
US8753926B2 (en) * 2010-09-14 2014-06-17 Qualcomm Incorporated Electronic packaging with a variable thickness mold cap
US9406658B2 (en) 2010-12-17 2016-08-02 Advanced Semiconductor Engineering, Inc. Embedded component device and manufacturing methods thereof
US9034692B2 (en) * 2011-03-21 2015-05-19 Stats Chippac Ltd. Integrated circuit packaging system with a flip chip and method of manufacture thereof
TWI590392B (zh) * 2015-08-03 2017-07-01 矽品精密工業股份有限公司 電子封裝件及其製法
JP7746888B2 (ja) * 2022-03-14 2025-10-01 住友電気工業株式会社 半導体装置およびその製造方法
CN117832190A (zh) * 2022-09-28 2024-04-05 星科金朋私人有限公司 集成封装及其制造方法

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US20060197210A1 (en) * 2005-03-04 2006-09-07 Hyun-Ki Kim Stack semiconductor package formed by multiple molding and method of manufacturing the same
US20060258044A1 (en) * 2005-05-11 2006-11-16 Infineon Technologies Ag Method of manufacturing a semiconductor device comprising stacked chips and a corresponding semiconductor device

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US8178982B2 (en) 2006-12-30 2012-05-15 Stats Chippac Ltd. Dual molded multi-chip package system
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US7888184B2 (en) 2008-06-20 2011-02-15 Stats Chippac Ltd. Integrated circuit packaging system with embedded circuitry and post, and method of manufacture thereof

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KR970703618A (ko) * 1995-04-05 1997-07-03 존 엠. 클락 3세 다층 리드 프레임(multi-layer lead frame)
US20060197210A1 (en) * 2005-03-04 2006-09-07 Hyun-Ki Kim Stack semiconductor package formed by multiple molding and method of manufacturing the same
US20060258044A1 (en) * 2005-05-11 2006-11-16 Infineon Technologies Ag Method of manufacturing a semiconductor device comprising stacked chips and a corresponding semiconductor device

Also Published As

Publication number Publication date
US20120193805A1 (en) 2012-08-02
TW200836272A (en) 2008-09-01
US20080157402A1 (en) 2008-07-03
US8178982B2 (en) 2012-05-15
KR20080063197A (ko) 2008-07-03
US8558399B2 (en) 2013-10-15
JP2008166816A (ja) 2008-07-17
JP5348632B2 (ja) 2013-11-20
TWI441265B (zh) 2014-06-11

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