KR101350632B1 - 플로팅 게이트 메모리 디바이스들 및 제조 - Google Patents

플로팅 게이트 메모리 디바이스들 및 제조 Download PDF

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KR101350632B1
KR101350632B1 KR1020097001240A KR20097001240A KR101350632B1 KR 101350632 B1 KR101350632 B1 KR 101350632B1 KR 1020097001240 A KR1020097001240 A KR 1020097001240A KR 20097001240 A KR20097001240 A KR 20097001240A KR 101350632 B1 KR101350632 B1 KR 101350632B1
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South Korea
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gate
layer
inter
floating gate
floating
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KR20090034892A (ko
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세이이찌 아리또메
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마이크론 테크놀로지, 인크.
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B69/00Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10Isolation regions comprising dielectric materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B41/00Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H10B41/35Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region with a cell select transistor, e.g. NAND
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01Manufacture or treatment
    • H10W10/011Manufacture or treatment of isolation regions comprising dielectric materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01Manufacture or treatment
    • H10W10/011Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/014Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations

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  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
KR1020097001240A 2006-06-21 2007-06-20 플로팅 게이트 메모리 디바이스들 및 제조 Active KR101350632B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/471,772 2006-06-21
US11/471,772 US7977190B2 (en) 2006-06-21 2006-06-21 Memory devices having reduced interference between floating gates and methods of fabricating such devices
PCT/US2007/014431 WO2007149515A2 (en) 2006-06-21 2007-06-20 Floating gate memory devices and fabrication

Publications (2)

Publication Number Publication Date
KR20090034892A KR20090034892A (ko) 2009-04-08
KR101350632B1 true KR101350632B1 (ko) 2014-01-10

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KR1020097001240A Active KR101350632B1 (ko) 2006-06-21 2007-06-20 플로팅 게이트 메모리 디바이스들 및 제조

Country Status (6)

Country Link
US (3) US7977190B2 (https=)
EP (1) EP2036122A2 (https=)
JP (1) JP5801030B2 (https=)
KR (1) KR101350632B1 (https=)
CN (1) CN101473429B (https=)
WO (1) WO2007149515A2 (https=)

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* Cited by examiner, † Cited by third party
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US7763933B2 (en) * 2007-02-15 2010-07-27 Micron Technology, Inc. Transistor constructions and processing methods
US7948021B2 (en) 2007-04-27 2011-05-24 Kabushiki Kaisha Toshiba Semiconductor memory device and method of fabricating the same
US20080273410A1 (en) * 2007-05-04 2008-11-06 Jaydeb Goswami Tungsten digitlines
JP4594973B2 (ja) 2007-09-26 2010-12-08 株式会社東芝 不揮発性半導体記憶装置
US8750040B2 (en) 2011-01-21 2014-06-10 Micron Technology, Inc. Memory devices having source lines directly coupled to body regions and methods
CN102184869B (zh) * 2011-04-28 2015-07-08 上海华虹宏力半导体制造有限公司 Mos晶体管隔离区制造方法及mos晶体管
CN105304549A (zh) * 2014-07-29 2016-02-03 盛美半导体设备(上海)有限公司 浅沟槽隔离结构的形成方法
EP3371812B1 (en) * 2015-11-03 2021-05-19 Silicon Storage Technology, Inc. Integration of metal floating gate in non-volatile memory

Citations (2)

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JPH08115988A (ja) * 1994-10-06 1996-05-07 Internatl Business Mach Corp <Ibm> 電気的に消去可能なプログラマブル・メモリおよびその製造方法
JP2005026591A (ja) * 2003-07-04 2005-01-27 Toshiba Corp 半導体記憶装置及びその製造方法

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US6781895B1 (en) 1991-12-19 2004-08-24 Kabushiki Kaisha Toshiba Non-volatile semiconductor memory device and memory system using the same
JP3469362B2 (ja) 1994-08-31 2003-11-25 株式会社東芝 半導体記憶装置
JP3583579B2 (ja) * 1997-06-06 2004-11-04 株式会社東芝 不揮発性半導体記憶装置およびその製造方法
JP4237344B2 (ja) * 1998-09-29 2009-03-11 株式会社東芝 半導体装置及びその製造方法
US6228713B1 (en) * 1999-06-28 2001-05-08 Chartered Semiconductor Manufacturing Ltd. Self-aligned floating gate for memory application using shallow trench isolation
US6461915B1 (en) 1999-09-01 2002-10-08 Micron Technology, Inc. Method and structure for an improved floating gate memory cell
JP2002076272A (ja) * 2000-08-23 2002-03-15 Sony Corp 半導体装置の製造方法
JP3984020B2 (ja) * 2000-10-30 2007-09-26 株式会社東芝 不揮発性半導体記憶装置
US6656852B2 (en) * 2001-12-06 2003-12-02 Texas Instruments Incorporated Method for the selective removal of high-k dielectrics
US6795326B2 (en) 2001-12-12 2004-09-21 Micron Technology, Inc. Flash array implementation with local and global bit lines
KR100462175B1 (ko) * 2002-02-08 2004-12-16 삼성전자주식회사 부유게이트를 갖는 비휘발성 메모리 소자의 셀 및 그제조방법
KR100537277B1 (ko) * 2002-11-27 2005-12-19 주식회사 하이닉스반도체 반도체 소자의 제조 방법
KR100501464B1 (ko) 2003-02-04 2005-07-18 동부아남반도체 주식회사 비휘발성 메모리 장치 제조 방법
JP4237561B2 (ja) 2003-07-04 2009-03-11 株式会社東芝 半導体記憶装置及びその製造方法
JP3998622B2 (ja) 2003-09-30 2007-10-31 株式会社東芝 不揮発性半導体記憶装置およびその製造方法
US6982905B2 (en) 2003-10-09 2006-01-03 Micron Technology, Inc. Method and apparatus for reading NAND flash memory array
US6996004B1 (en) 2003-11-04 2006-02-07 Advanced Micro Devices, Inc. Minimization of FG-FG coupling in flash memory
KR20050048114A (ko) * 2003-11-19 2005-05-24 주식회사 하이닉스반도체 플래쉬 메모리 소자의 제조 방법
US7045419B2 (en) * 2003-12-12 2006-05-16 Macronix International Co., Ltd. Elimination of the fast-erase phenomena in flash memory
JP2005209931A (ja) * 2004-01-23 2005-08-04 Renesas Technology Corp 不揮発性半導体記憶装置およびその製造方法
US6951790B1 (en) 2004-03-24 2005-10-04 Micron Technology, Inc. Method of forming select lines for NAND memory devices
US7332408B2 (en) * 2004-06-28 2008-02-19 Micron Technology, Inc. Isolation trenches for memory devices
JP2007096151A (ja) * 2005-09-30 2007-04-12 Toshiba Corp 半導体記憶装置およびその製造方法

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08115988A (ja) * 1994-10-06 1996-05-07 Internatl Business Mach Corp <Ibm> 電気的に消去可能なプログラマブル・メモリおよびその製造方法
JP2005026591A (ja) * 2003-07-04 2005-01-27 Toshiba Corp 半導体記憶装置及びその製造方法

Also Published As

Publication number Publication date
WO2007149515A2 (en) 2007-12-27
US20130237031A1 (en) 2013-09-12
JP5801030B2 (ja) 2015-10-28
CN101473429B (zh) 2011-08-03
US9018059B2 (en) 2015-04-28
US20110266610A1 (en) 2011-11-03
US8441058B2 (en) 2013-05-14
US20070296015A1 (en) 2007-12-27
EP2036122A2 (en) 2009-03-18
JP2009541999A (ja) 2009-11-26
WO2007149515A3 (en) 2008-02-21
US7977190B2 (en) 2011-07-12
CN101473429A (zh) 2009-07-01
KR20090034892A (ko) 2009-04-08

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