KR101329462B1 - 격리 영역 형성 방법, 샬로우 트렌치 격리 영역 형성 방법 - Google Patents

격리 영역 형성 방법, 샬로우 트렌치 격리 영역 형성 방법 Download PDF

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KR101329462B1
KR101329462B1 KR1020097004162A KR20097004162A KR101329462B1 KR 101329462 B1 KR101329462 B1 KR 101329462B1 KR 1020097004162 A KR1020097004162 A KR 1020097004162A KR 20097004162 A KR20097004162 A KR 20097004162A KR 101329462 B1 KR101329462 B1 KR 101329462B1
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mask layer
semiconductor substrate
hard mask
implant
dopant
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KR20090045294A (ko
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훙 쿡 도안
에릭 고든 스티븐스
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옴니비전 테크놀러지즈 인코포레이티드
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0151—Manufacturing their isolation regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/011—Manufacture or treatment of image sensors covered by group H10F39/12
    • H10F39/014—Manufacture or treatment of image sensors covered by group H10F39/12 of CMOS image sensors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/80—Constructional details of image sensors
    • H10F39/807—Pixel isolation structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/014—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations
    • H10W10/0148—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations comprising introducing impurities in side walls or bottom walls of trenches, e.g. for forming channel stoppers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/17—Isolation regions comprising dielectric materials formed using trench refilling with dielectric materials, e.g. shallow trench isolations

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KR1020097004162A 2006-09-01 2007-08-29 격리 영역 형성 방법, 샬로우 트렌치 격리 영역 형성 방법 Active KR101329462B1 (ko)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US84207506P 2006-09-01 2006-09-01
US60/842,075 2006-09-01
US11/840,299 US20080057612A1 (en) 2006-09-01 2007-08-17 Method for adding an implant at the shallow trench isolation corner in a semiconductor substrate
US11/840,299 2007-08-17
PCT/US2007/018997 WO2008030371A2 (en) 2006-09-01 2007-08-29 Implant at shallow trench isolation corner

Publications (2)

Publication Number Publication Date
KR20090045294A KR20090045294A (ko) 2009-05-07
KR101329462B1 true KR101329462B1 (ko) 2013-11-13

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KR1020097004162A Active KR101329462B1 (ko) 2006-09-01 2007-08-29 격리 영역 형성 방법, 샬로우 트렌치 격리 영역 형성 방법

Country Status (7)

Country Link
US (1) US20080057612A1 (https=)
EP (1) EP2057675B1 (https=)
JP (1) JP5281008B2 (https=)
KR (1) KR101329462B1 (https=)
DE (1) DE602007009548D1 (https=)
TW (1) TWI413167B (https=)
WO (1) WO2008030371A2 (https=)

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US20100148230A1 (en) * 2008-12-11 2010-06-17 Stevens Eric G Trench isolation regions in image sensors
US7968424B2 (en) * 2009-01-16 2011-06-28 Taiwan Semiconductor Manufacturing Company, Ltd. Method of implantation
US7838325B2 (en) * 2009-02-13 2010-11-23 Taiwan Semiconductor Manufacturing Company, Ltd. Method to optimize substrate thickness for image sensor device
US9196547B2 (en) * 2009-04-03 2015-11-24 Taiwan Semiconductor Manufacturing Company, Ltd. Dual shallow trench isolation and related applications
US9000500B2 (en) 2009-12-30 2015-04-07 Omnivision Technologies, Inc. Image sensor with doped transfer gate
US8048711B2 (en) * 2009-12-30 2011-11-01 Omnivision Technologies, Inc. Method for forming deep isolation in imagers
US8367512B2 (en) 2010-08-30 2013-02-05 Taiwan Semiconductor Manufacturing Company, Ltd. Self-aligned implants to reduce cross-talk of imaging sensors
FR2981502A1 (fr) * 2011-10-18 2013-04-19 St Microelectronics Crolles 2 Procede de realisation d'au moins une tranchee d'isolation profonde
US9040891B2 (en) * 2012-06-08 2015-05-26 Taiwan Semiconductor Manufacturing Company, Ltd. Image device and methods of forming the same
US9355888B2 (en) 2012-10-01 2016-05-31 Taiwan Semiconductor Manufacturing Company, Ltd. Implant isolated devices and method for forming the same
US9673245B2 (en) * 2012-10-01 2017-06-06 Taiwan Semiconductor Manufacturing Company, Ltd. Implant isolated devices and method for forming the same
US8969997B2 (en) * 2012-11-14 2015-03-03 Taiwan Semiconductor Manufacturing Company, Ltd. Isolation structures and methods of forming the same
WO2014209421A1 (en) * 2013-06-29 2014-12-31 Sionyx, Inc. Shallow trench textured regions and associated methods
JP6362449B2 (ja) 2014-07-01 2018-07-25 ルネサスエレクトロニクス株式会社 半導体集積回路装置の製造方法
KR102399338B1 (ko) * 2014-09-12 2022-05-19 삼성전자주식회사 이미지 센서의 제조 방법
US9647022B2 (en) * 2015-02-12 2017-05-09 Taiwan Semiconductor Manufacturing Co., Ltd. Multi-layer structure for high aspect ratio etch
US10580789B2 (en) * 2017-07-10 2020-03-03 Macronix International Co., Ltd. Semiconductor device having etching control layer in substrate and method of fabricating the same
CN109256389B (zh) * 2017-07-13 2021-06-11 旺宏电子股份有限公司 半导体元件及其制造方法
CN110021559B (zh) * 2018-01-09 2021-08-24 联华电子股份有限公司 半导体元件及其制作方法
US11923205B2 (en) * 2021-12-17 2024-03-05 United Microelectronics Corporation Method for manufacturing semiconductor device
CN119153486B (zh) * 2023-06-08 2025-10-10 长鑫存储技术有限公司 半导体结构及其制备方法

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US6150235A (en) * 2000-01-24 2000-11-21 Worldwide Semiconductor Manufacturing Corp. Method of forming shallow trench isolation structures

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JPH01125935A (ja) * 1987-11-11 1989-05-18 Seiko Instr & Electron Ltd 半導体装置の製造方法
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Also Published As

Publication number Publication date
WO2008030371A2 (en) 2008-03-13
WO2008030371A3 (en) 2008-04-17
KR20090045294A (ko) 2009-05-07
EP2057675B1 (en) 2010-09-29
US20080057612A1 (en) 2008-03-06
TWI413167B (zh) 2013-10-21
TW200830381A (en) 2008-07-16
JP2010503212A (ja) 2010-01-28
DE602007009548D1 (de) 2010-11-11
EP2057675A2 (en) 2009-05-13
JP5281008B2 (ja) 2013-09-04

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