KR101215425B1 - 개선된 매칭을 위한 가드 링 - Google Patents

개선된 매칭을 위한 가드 링 Download PDF

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Publication number
KR101215425B1
KR101215425B1 KR1020050085840A KR20050085840A KR101215425B1 KR 101215425 B1 KR101215425 B1 KR 101215425B1 KR 1020050085840 A KR1020050085840 A KR 1020050085840A KR 20050085840 A KR20050085840 A KR 20050085840A KR 101215425 B1 KR101215425 B1 KR 101215425B1
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South Korea
Prior art keywords
guard ring
photoresist
devices
features
delete delete
Prior art date
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Expired - Lifetime
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KR1020050085840A
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English (en)
Korean (ko)
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KR20060051300A (ko
Inventor
대니얼 찰스 케르
로스코 티. 루체
미첼 마리 제미슨
알란 상곤 첸
윌리엄 에이. 러셀
Original Assignee
에이저 시스템즈 엘엘시
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Publication of KR20060051300A publication Critical patent/KR20060051300A/ko
Application granted granted Critical
Publication of KR101215425B1 publication Critical patent/KR101215425B1/ko
Assigned to 아바고 테크놀로지스 제너럴 아이피 (싱가포르) 피티이 리미티드 reassignment 아바고 테크놀로지스 제너럴 아이피 (싱가포르) 피티이 리미티드 권리의 전부이전등록 Assignors: 에이저 시스템즈 엘엘시
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P76/00Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
    • H10P76/20Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P76/00Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
    • H10P76/20Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials
    • H10P76/204Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials of organic photoresist masks
    • H10P76/2041Photolithographic processes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W42/00Arrangements for protection of devices
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/942Masking
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/942Masking
    • Y10S438/947Subphotolithographic processing
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/942Masking
    • Y10S438/948Radiation resist
    • Y10S438/95Multilayer mask including nonradiation sensitive layer

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  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Drying Of Semiconductors (AREA)
KR1020050085840A 2004-09-14 2005-09-14 개선된 매칭을 위한 가드 링 Expired - Lifetime KR101215425B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/941,665 US7253012B2 (en) 2004-09-14 2004-09-14 Guard ring for improved matching
US10/941,665 2004-09-14

Related Child Applications (1)

Application Number Title Priority Date Filing Date
KR1020120019484A Division KR20120023172A (ko) 2004-09-14 2012-02-27 개선된 매칭을 위한 가드 링

Publications (2)

Publication Number Publication Date
KR20060051300A KR20060051300A (ko) 2006-05-19
KR101215425B1 true KR101215425B1 (ko) 2012-12-26

Family

ID=36034618

Family Applications (2)

Application Number Title Priority Date Filing Date
KR1020050085840A Expired - Lifetime KR101215425B1 (ko) 2004-09-14 2005-09-14 개선된 매칭을 위한 가드 링
KR1020120019484A Ceased KR20120023172A (ko) 2004-09-14 2012-02-27 개선된 매칭을 위한 가드 링

Family Applications After (1)

Application Number Title Priority Date Filing Date
KR1020120019484A Ceased KR20120023172A (ko) 2004-09-14 2012-02-27 개선된 매칭을 위한 가드 링

Country Status (5)

Country Link
US (2) US7253012B2 (https=)
JP (2) JP4944414B2 (https=)
KR (2) KR101215425B1 (https=)
CN (1) CN1750252B (https=)
TW (1) TWI368258B (https=)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7958467B2 (en) * 2006-06-20 2011-06-07 Adtran, Inc. Deterministic system and method for generating wiring layouts for integrated circuits
US7992117B2 (en) * 2006-06-20 2011-08-02 Adtran, Inc. System and method for designing a common centroid layout for an integrated circuit
KR101782503B1 (ko) * 2011-05-18 2017-09-28 삼성전자 주식회사 솔더 범프 붕괴를 억제하는 반도체 소자의 범프 형성방법
CN102339826B (zh) * 2011-11-01 2013-01-16 矽力杰半导体技术(杭州)有限公司 一种器件匹配的集成电路及其设计方法
US8846302B2 (en) * 2012-02-01 2014-09-30 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor structure and method and tool for forming the semiconductor structure
US8658444B2 (en) * 2012-05-16 2014-02-25 International Business Machines Corporation Semiconductor active matrix on buried insulator
US9202000B1 (en) * 2014-09-30 2015-12-01 Cadence Design Systems, Inc. Implementing designs of guard ring and fill structures from simple unit cells

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003142583A (ja) * 2001-11-01 2003-05-16 Seiko Epson Corp 半導体装置及びその設計方法
JP2004111626A (ja) * 2002-09-18 2004-04-08 Renesas Technology Corp 半導体装置

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59161834A (ja) * 1983-03-07 1984-09-12 Oki Electric Ind Co Ltd 半導体装置の製造方法
JPS61206262A (ja) * 1985-03-11 1986-09-12 Shindengen Electric Mfg Co Ltd 高耐圧プレ−ナ型半導体装置
US4988636A (en) * 1990-01-29 1991-01-29 International Business Machines Corporation Method of making bit stack compatible input/output circuits
EP0538507B1 (de) * 1991-10-22 1996-12-27 Deutsche ITT Industries GmbH Schutzschaltung für Anschlusskontakte von monolithisch integrierten Schaltungen
JP3223490B2 (ja) * 1993-06-30 2001-10-29 ソニー株式会社 半導体集積回路製造方法
US5965925A (en) 1997-10-22 1999-10-12 Artisan Components, Inc. Integrated circuit layout methods and layout structures
JP3998454B2 (ja) * 2001-10-31 2007-10-24 株式会社東芝 電力用半導体装置
US6646509B2 (en) 2002-01-23 2003-11-11 Broadcom Corporation Layout technique for matched resistors on an integrated circuit substrate
US7393755B2 (en) 2002-06-07 2008-07-01 Cadence Design Systems, Inc. Dummy fill for integrated circuits
US7148089B2 (en) * 2004-03-01 2006-12-12 Taiwan Semiconductor Manufacturing Co., Ltd. Method for forming copper fuse links

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003142583A (ja) * 2001-11-01 2003-05-16 Seiko Epson Corp 半導体装置及びその設計方法
JP2004111626A (ja) * 2002-09-18 2004-04-08 Renesas Technology Corp 半導体装置

Also Published As

Publication number Publication date
US20060057840A1 (en) 2006-03-16
TWI368258B (en) 2012-07-11
JP2006086533A (ja) 2006-03-30
US20070212873A1 (en) 2007-09-13
JP4944414B2 (ja) 2012-05-30
US7253012B2 (en) 2007-08-07
CN1750252B (zh) 2012-05-30
TW200633007A (en) 2006-09-16
KR20120023172A (ko) 2012-03-12
CN1750252A (zh) 2006-03-22
KR20060051300A (ko) 2006-05-19
JP2012060152A (ja) 2012-03-22
US7407824B2 (en) 2008-08-05

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