TWI368258B - Guard ring for improved matching - Google Patents

Guard ring for improved matching

Info

Publication number
TWI368258B
TWI368258B TW094128975A TW94128975A TWI368258B TW I368258 B TWI368258 B TW I368258B TW 094128975 A TW094128975 A TW 094128975A TW 94128975 A TW94128975 A TW 94128975A TW I368258 B TWI368258 B TW I368258B
Authority
TW
Taiwan
Prior art keywords
guard ring
improved matching
matching
improved
guard
Prior art date
Application number
TW094128975A
Other languages
English (en)
Chinese (zh)
Other versions
TW200633007A (en
Inventor
Daniel Charles Kerr
Roscoe T Luce
Michele Marie Jamison
Alan Sangone Chen
William A Russell
Original Assignee
Agere Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agere Systems Inc filed Critical Agere Systems Inc
Publication of TW200633007A publication Critical patent/TW200633007A/zh
Application granted granted Critical
Publication of TWI368258B publication Critical patent/TWI368258B/zh

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
    • H10P76/20—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
    • H10P76/20—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials
    • H10P76/204—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials of organic photoresist masks
    • H10P76/2041—Photolithographic processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W42/00—Arrangements for protection of devices
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/942—Masking
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/942—Masking
    • Y10S438/947—Subphotolithographic processing
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/942—Masking
    • Y10S438/948—Radiation resist
    • Y10S438/95—Multilayer mask including nonradiation sensitive layer
TW094128975A 2004-09-14 2005-08-24 Guard ring for improved matching TWI368258B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/941,665 US7253012B2 (en) 2004-09-14 2004-09-14 Guard ring for improved matching

Publications (2)

Publication Number Publication Date
TW200633007A TW200633007A (en) 2006-09-16
TWI368258B true TWI368258B (en) 2012-07-11

Family

ID=36034618

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094128975A TWI368258B (en) 2004-09-14 2005-08-24 Guard ring for improved matching

Country Status (5)

Country Link
US (2) US7253012B2 (https=)
JP (2) JP4944414B2 (https=)
KR (2) KR101215425B1 (https=)
CN (1) CN1750252B (https=)
TW (1) TWI368258B (https=)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7958467B2 (en) * 2006-06-20 2011-06-07 Adtran, Inc. Deterministic system and method for generating wiring layouts for integrated circuits
US7992117B2 (en) * 2006-06-20 2011-08-02 Adtran, Inc. System and method for designing a common centroid layout for an integrated circuit
KR101782503B1 (ko) * 2011-05-18 2017-09-28 삼성전자 주식회사 솔더 범프 붕괴를 억제하는 반도체 소자의 범프 형성방법
CN102339826B (zh) * 2011-11-01 2013-01-16 矽力杰半导体技术(杭州)有限公司 一种器件匹配的集成电路及其设计方法
US8846302B2 (en) * 2012-02-01 2014-09-30 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor structure and method and tool for forming the semiconductor structure
US8658444B2 (en) * 2012-05-16 2014-02-25 International Business Machines Corporation Semiconductor active matrix on buried insulator
US9202000B1 (en) * 2014-09-30 2015-12-01 Cadence Design Systems, Inc. Implementing designs of guard ring and fill structures from simple unit cells

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59161834A (ja) * 1983-03-07 1984-09-12 Oki Electric Ind Co Ltd 半導体装置の製造方法
JPS61206262A (ja) * 1985-03-11 1986-09-12 Shindengen Electric Mfg Co Ltd 高耐圧プレ−ナ型半導体装置
US4988636A (en) * 1990-01-29 1991-01-29 International Business Machines Corporation Method of making bit stack compatible input/output circuits
EP0538507B1 (de) * 1991-10-22 1996-12-27 Deutsche ITT Industries GmbH Schutzschaltung für Anschlusskontakte von monolithisch integrierten Schaltungen
JP3223490B2 (ja) * 1993-06-30 2001-10-29 ソニー株式会社 半導体集積回路製造方法
US5965925A (en) 1997-10-22 1999-10-12 Artisan Components, Inc. Integrated circuit layout methods and layout structures
JP3998454B2 (ja) * 2001-10-31 2007-10-24 株式会社東芝 電力用半導体装置
JP2003142583A (ja) * 2001-11-01 2003-05-16 Seiko Epson Corp 半導体装置及びその設計方法
US6646509B2 (en) 2002-01-23 2003-11-11 Broadcom Corporation Layout technique for matched resistors on an integrated circuit substrate
US7393755B2 (en) 2002-06-07 2008-07-01 Cadence Design Systems, Inc. Dummy fill for integrated circuits
JP4353685B2 (ja) * 2002-09-18 2009-10-28 株式会社ルネサステクノロジ 半導体装置
US7148089B2 (en) * 2004-03-01 2006-12-12 Taiwan Semiconductor Manufacturing Co., Ltd. Method for forming copper fuse links

Also Published As

Publication number Publication date
US20060057840A1 (en) 2006-03-16
JP2006086533A (ja) 2006-03-30
US20070212873A1 (en) 2007-09-13
JP4944414B2 (ja) 2012-05-30
US7253012B2 (en) 2007-08-07
CN1750252B (zh) 2012-05-30
KR101215425B1 (ko) 2012-12-26
TW200633007A (en) 2006-09-16
KR20120023172A (ko) 2012-03-12
CN1750252A (zh) 2006-03-22
KR20060051300A (ko) 2006-05-19
JP2012060152A (ja) 2012-03-22
US7407824B2 (en) 2008-08-05

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees